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    <title>MQX Software SolutionsのトピックMQX SPI multi chip select problem</title>
    <link>https://community.nxp.com/t5/MQX-Software-Solutions/MQX-SPI-multi-chip-select-problem/m-p/1236804#M18612</link>
    <description>&lt;P&gt;I am having a problem using the multiple SPI CS signals in my K20 application.&amp;nbsp; My application uses SPI0 and addresses two memory devices using 2 CS signals (CS0, and CS1).&amp;nbsp; I had things working for CS0 but CS1 does not seems to work.&amp;nbsp;&amp;nbsp; I am using MQX4.1 and IAR.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In my bsp I changed init_gpio.c by modifying case 0 in the _bsp_dspi_io_init function as shown below.&lt;/P&gt;&lt;P&gt;_mqx_int _bsp_dspi_io_init&lt;BR /&gt;(&lt;BR /&gt;uint_32 dev_num&lt;BR /&gt;)&lt;BR /&gt;{&lt;BR /&gt;SIM_MemMapPtr sim = SIM_BASE_PTR;&lt;BR /&gt;PORT_MemMapPtr pctl;&lt;/P&gt;&lt;P&gt;switch (dev_num)&lt;BR /&gt;{&lt;BR /&gt;case 0:&lt;BR /&gt;/* Configure GPIOD for SPI0 peripheral function */&lt;BR /&gt;pctl = (PORT_MemMapPtr)PORTD_BASE_PTR;&lt;/P&gt;&lt;P&gt;pctl-&amp;gt;PCR[0] = PORT_PCR_MUX(2) | PORT_PCR_DSE_MASK; /* DSPI0.PCS0 */&lt;BR /&gt;pctl-&amp;gt;PCR[4] = PORT_PCR_MUX(2) | PORT_PCR_DSE_MASK; /* DSPI0.PCS1 */&lt;BR /&gt;pctl-&amp;gt;PCR[1] = PORT_PCR_MUX(2) | PORT_PCR_DSE_MASK; /* DSPI0.SCK */&lt;BR /&gt;pctl-&amp;gt;PCR[2] = PORT_PCR_MUX(2) | PORT_PCR_DSE_MASK; /* DSPI0.SOUT */&lt;BR /&gt;pctl-&amp;gt;PCR[3] = PORT_PCR_MUX(2) | PORT_PCR_DSE_MASK; /* DSPI0.SIN */&lt;/P&gt;&lt;P&gt;/* Enable clock gate to SPI0 module */&lt;BR /&gt;sim-&amp;gt;SCGC6 |= SIM_SCGC6_SPI0_MASK;&lt;BR /&gt;break;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In my application I open/close the SPI0 port depending upon which of the 2 devices&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;spif0 = fopen("spi0:0", NULL);&lt;BR /&gt;spif1 = fopen("spi0:1", NULL);&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Is there any examples of how to properly configure a BSP to use multiple SPI select signals with MQX?&amp;nbsp;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 25 Feb 2021 18:52:38 GMT</pubDate>
    <dc:creator>terence_kong</dc:creator>
    <dc:date>2021-02-25T18:52:38Z</dc:date>
    <item>
      <title>MQX SPI multi chip select problem</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/MQX-SPI-multi-chip-select-problem/m-p/1236804#M18612</link>
      <description>&lt;P&gt;I am having a problem using the multiple SPI CS signals in my K20 application.&amp;nbsp; My application uses SPI0 and addresses two memory devices using 2 CS signals (CS0, and CS1).&amp;nbsp; I had things working for CS0 but CS1 does not seems to work.&amp;nbsp;&amp;nbsp; I am using MQX4.1 and IAR.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In my bsp I changed init_gpio.c by modifying case 0 in the _bsp_dspi_io_init function as shown below.&lt;/P&gt;&lt;P&gt;_mqx_int _bsp_dspi_io_init&lt;BR /&gt;(&lt;BR /&gt;uint_32 dev_num&lt;BR /&gt;)&lt;BR /&gt;{&lt;BR /&gt;SIM_MemMapPtr sim = SIM_BASE_PTR;&lt;BR /&gt;PORT_MemMapPtr pctl;&lt;/P&gt;&lt;P&gt;switch (dev_num)&lt;BR /&gt;{&lt;BR /&gt;case 0:&lt;BR /&gt;/* Configure GPIOD for SPI0 peripheral function */&lt;BR /&gt;pctl = (PORT_MemMapPtr)PORTD_BASE_PTR;&lt;/P&gt;&lt;P&gt;pctl-&amp;gt;PCR[0] = PORT_PCR_MUX(2) | PORT_PCR_DSE_MASK; /* DSPI0.PCS0 */&lt;BR /&gt;pctl-&amp;gt;PCR[4] = PORT_PCR_MUX(2) | PORT_PCR_DSE_MASK; /* DSPI0.PCS1 */&lt;BR /&gt;pctl-&amp;gt;PCR[1] = PORT_PCR_MUX(2) | PORT_PCR_DSE_MASK; /* DSPI0.SCK */&lt;BR /&gt;pctl-&amp;gt;PCR[2] = PORT_PCR_MUX(2) | PORT_PCR_DSE_MASK; /* DSPI0.SOUT */&lt;BR /&gt;pctl-&amp;gt;PCR[3] = PORT_PCR_MUX(2) | PORT_PCR_DSE_MASK; /* DSPI0.SIN */&lt;/P&gt;&lt;P&gt;/* Enable clock gate to SPI0 module */&lt;BR /&gt;sim-&amp;gt;SCGC6 |= SIM_SCGC6_SPI0_MASK;&lt;BR /&gt;break;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In my application I open/close the SPI0 port depending upon which of the 2 devices&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;spif0 = fopen("spi0:0", NULL);&lt;BR /&gt;spif1 = fopen("spi0:1", NULL);&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Is there any examples of how to properly configure a BSP to use multiple SPI select signals with MQX?&amp;nbsp;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 25 Feb 2021 18:52:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/MQX-SPI-multi-chip-select-problem/m-p/1236804#M18612</guid>
      <dc:creator>terence_kong</dc:creator>
      <dc:date>2021-02-25T18:52:38Z</dc:date>
    </item>
    <item>
      <title>Re: MQX SPI multi chip select problem</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/MQX-SPI-multi-chip-select-problem/m-p/1237658#M18614</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Please be noted that the value after the colon is the chip select mask value, not the chip select number directly.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;If you need to assert CS0 and CS1, this field should be set to 3.&lt;/P&gt;
&lt;P&gt;spi_handle = fopen("spi0:3", NULL);&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;</description>
      <pubDate>Mon, 01 Mar 2021 03:22:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/MQX-SPI-multi-chip-select-problem/m-p/1237658#M18614</guid>
      <dc:creator>danielchen</dc:creator>
      <dc:date>2021-03-01T03:22:12Z</dc:date>
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