K70 DDR2 temperature affect read data

linguohui — Thu, 30 Jul 2020 08:40:07 GMT

Default DDR2 configuration of ddr data error of high temperature exists.

By modifying the :

sim->MCR &= 0xFFFFFF00;

sim->MCR |= 0xC4;

This modified can solve the problem of high temperature DDR data error, but cause low temperature (10 - c) read DDR data error

I found MCR -> DDRDQSDIS = 1 high temperature ddr data error, MCR -> DDRDQSDIS = 0 low temperature(-10C) error

Finally, I by single chip microcomputer internal ADC temperature sensor, automatic adjustment, but long run time is still likely to collapse(Not ideal)

Is there a better solution?

the same problem:

K70 and DDR2 SDRAM unstable work

K70 DDR2 read failure with increasing temperature

My DDR configuration code:

void _bsp_ddr2_setup (void)

{

SIM_MemMapPtr sim = SIM_BASE_PTR;

DDR_MemMapPtr ddr = DDR_BASE_PTR;

MCM_MemMapPtr mcm = MCM_BASE_PTR;

/* Enable DDR controller clock */

sim->SCGC3 |= SIM_SCGC3_DDR_MASK;

/* Enable DDR pads and set slew rate */

sim->MCR &= 0xFFFFFF00;

sim->MCR |= 0xC4; /* bits were left out of the manual so there isn't a macro right now */

ddr->RCR |= DDR_RCR_RST_MASK;

*(vuint_32 *)(0x400Ae1ac) = 0x01030203;

/* TC's init */

ddr->CR00 = 0x00000400;

ddr->CR02 = 0x02000031;

ddr->CR03 = 0x02020506;

ddr->CR04 = 0x06090202;

ddr->CR05 = 0x02020302;

ddr->CR06 = 0x02904002;

ddr->CR07 = 0x01000303;

ddr->CR08 = 0x05030201;

ddr->CR09 = 0x020000c8;

ddr->CR10 = 0x03003207;

ddr->CR11 = 0x01000000;

ddr->CR12 = 0x04920031;

ddr->CR13 = 0x00000005;

ddr->CR14 = 0x00C80002;

ddr->CR15 = 0x00000032;

ddr->CR16 = 0x00000001;

ddr->CR20 = 0x00030300;

ddr->CR21 = 0x00040232;

ddr->CR22 = 0x00000000;

ddr->CR23 = 0x00040302;

ddr->CR25 = 0x0A010201;

ddr->CR26 = 0x0101FFFF;

ddr->CR27 = 0x01010101;

ddr->CR28 = 0x00000003;

ddr->CR29 = 0x00000000;

ddr->CR30 = 0x00000001;

ddr->CR34 = 0x02020101;

ddr->CR36 = 0x01010201;

ddr->CR37 = 0x00000200;

ddr->CR38 = 0x00200000;

ddr->CR39 = 0x01010020;

ddr->CR40 = 0x00002000;

ddr->CR41 = 0x01010020;

ddr->CR42 = 0x00002000;

ddr->CR43 = 0x01010020;

ddr->CR44 = 0x00000000;

ddr->CR45 = 0x03030303;

ddr->CR46 = 0x02006401;

ddr->CR47 = 0x01020202;

ddr->CR48 = 0x01010064;

ddr->CR49 = 0x00020101;

ddr->CR50 = 0x00000064;

ddr->CR52 = 0x02000602;

ddr->CR53 = 0x03c80000;

ddr->CR54 = 0x03c803c8;

ddr->CR55 = 0x03c803c8;

ddr->CR56 = 0x020303c8;

ddr->CR57 = 0x01010002;

_ASM_NOP();

ddr->CR00 |= 0x00000001;

while ((ddr->CR30 & 0x400) != 0x400) {

}

mcm->CR |= MCM_CR_DDRSIZE(1);

}

Re: K70 DDR2 temperature affect read data

FelipeGarcia — Mon, 03 Aug 2020 18:59:27 GMT

Hi,

Could you please confirm your device mask? There is an errata in which the DDR controller read logic can get out of synchronization. For the small subset of devices that exhibit the issue, the problem occurs within a narrow temperature window.

I recommend you to check the errata document below to see more information and workaround.

https://www.nxp.com/docs/en/errata/KINETIS_4N96B.pdf

Best regards,

Felipe

-------------------------------------------------------------------------------

Note:

- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored.

Please open a new thread and refer to the closed one, if you have a related question at a later point in time.

------------------------------------------------------------------------------

MQX Software SolutionsのトピックRe: K70 DDR2 temperature affect read data

K70 DDR2 temperature affect read data

Re: K70 DDR2 temperature affect read data