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    <title>MQX Software Solutions中的主题 Re: K61 SPI over DMA using MQX I/O peripheral code performance issue</title>
    <link>https://community.nxp.com/t5/MQX-Software-Solutions/K61-SPI-over-DMA-using-MQX-I-O-peripheral-code-performance-issue/m-p/933472#M18290</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Daniel,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your reply. I knew this issue, so I was using eDMA for SPI2 only, SPI0 and SPI1 are using normal interrupt based. Before DMA implementation, I was using SPI2 as interrupted based but which made some context switching delay between task. how can I used current eDMA I/O peripheral driver in interrupt mode?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In below code we used to&amp;nbsp;&lt;SPAN&gt;DSPI_ATTR_USE_ISR enable SPI2 on interrupt based.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;const SPI_INIT_STRUCT _bsp_spi2_init = {&lt;BR /&gt; &amp;amp;_spi_dspi_devif, /* Low level driver interface */&lt;BR /&gt; &amp;amp;_bsp_dspi2_init, /* Low level driver init data */&lt;BR /&gt; { /* Default parameters: */&lt;BR /&gt; 10000000, /* Baudrate */&lt;BR /&gt; SPI_CLK_POL_PHA_MODE0, /* Mode */&lt;BR /&gt; 8, /* Frame size */&lt;BR /&gt; 1, /* Chip select */&lt;BR /&gt; DSPI_ATTR_USE_ISR, /* Attributes */&lt;BR /&gt; 0xFFFFFFFF /* Dummy pattern */&lt;BR /&gt; }&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;but if I use DMA based, how can I enable DMA interrupt?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please let me know.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Br,&lt;/P&gt;&lt;P&gt;Paul&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 09 Oct 2019 09:06:52 GMT</pubDate>
    <dc:creator>jinspaul</dc:creator>
    <dc:date>2019-10-09T09:06:52Z</dc:date>
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      <title>K61 SPI over DMA using MQX I/O peripheral code performance issue</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/K61-SPI-over-DMA-using-MQX-I-O-peripheral-code-performance-issue/m-p/933470#M18288</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Team,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I've been using SPI for K61 to communicate&amp;nbsp; wifi chip (Ti CC3120). My SPI communication running on 20MHz speed. To improve the performance (we have a webhmi, which communicate through wifi chip) I have used SPI over DMA.&lt;/P&gt;&lt;P&gt;SPI2 codes i have modified for DMA init.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. In the&amp;nbsp;_bsp_init() function I've enabled&amp;nbsp;&lt;/P&gt;&lt;P&gt;/* Initialize DMA */&lt;BR /&gt; result = dma_init(_bsp_dma_devif_list);&lt;BR /&gt; if (result != MQX_OK) {&lt;BR /&gt; return result;&lt;BR /&gt; }&lt;/P&gt;&lt;P&gt;2. and SPI&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#if BSPCFG_ENABLE_SPI2&lt;BR /&gt; _io_spi_install("spi2:", &amp;amp;_bsp_spi2_init);&lt;BR /&gt;#endif&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;the only change i have done is code is; added&amp;nbsp;&lt;SPAN&gt;DSPI_ATTR_USE_ISR in the SPI2 init.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;const SPI_INIT_STRUCT _bsp_spi2_init = {&lt;BR /&gt; &amp;amp;_spi_dspi_dma_devif, /* Low level driver interface */&lt;BR /&gt; &amp;amp;_bsp_dspi2_init, /* Low level driver init data */&lt;BR /&gt; { /* Default parameters: */&lt;BR /&gt; 20000000, /* Baudrate */&lt;BR /&gt; SPI_CLK_POL_PHA_MODE0, /* Mode */&lt;BR /&gt; 8, /* Frame size */&lt;BR /&gt; 1, /* Chip select */&lt;BR /&gt; DSPI_ATTR_USE_ISR, /* Attributes */&lt;BR /&gt; 0xFFFFFFFF /* Dummy pattern */&lt;BR /&gt; }&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I was expecting my webhmi communication works very fast after above changes but performance went down. I didn't change much in the application code which runs on MQX4.2.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Am I missing something in above procedure? I don't have clear idea about&amp;nbsp; how DMA I/O peripheral code works.&lt;/P&gt;&lt;P&gt;I'm using IO_read and IO_write function for SPI read and write. how can I improve the SPI communication performance ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please guide me.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance.&lt;/P&gt;&lt;P&gt;Br,&lt;/P&gt;&lt;P&gt;Paul&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 01 Oct 2019 08:24:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/K61-SPI-over-DMA-using-MQX-I-O-peripheral-code-performance-issue/m-p/933470#M18288</guid>
      <dc:creator>jinspaul</dc:creator>
      <dc:date>2019-10-01T08:24:42Z</dc:date>
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    <item>
      <title>Re: K61 SPI over DMA using MQX I/O peripheral code performance issue</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/K61-SPI-over-DMA-using-MQX-I-O-peripheral-code-performance-issue/m-p/933471#M18289</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Paul:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please refer to known issues and limitations of the DSPI issues related to the DMA usage in MQX_Release_Notes.pdf&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/81875iACC258042193FFCB/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Daniel&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 09 Oct 2019 01:30:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/K61-SPI-over-DMA-using-MQX-I-O-peripheral-code-performance-issue/m-p/933471#M18289</guid>
      <dc:creator>danielchen</dc:creator>
      <dc:date>2019-10-09T01:30:19Z</dc:date>
    </item>
    <item>
      <title>Re: K61 SPI over DMA using MQX I/O peripheral code performance issue</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/K61-SPI-over-DMA-using-MQX-I-O-peripheral-code-performance-issue/m-p/933472#M18290</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Daniel,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your reply. I knew this issue, so I was using eDMA for SPI2 only, SPI0 and SPI1 are using normal interrupt based. Before DMA implementation, I was using SPI2 as interrupted based but which made some context switching delay between task. how can I used current eDMA I/O peripheral driver in interrupt mode?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In below code we used to&amp;nbsp;&lt;SPAN&gt;DSPI_ATTR_USE_ISR enable SPI2 on interrupt based.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;const SPI_INIT_STRUCT _bsp_spi2_init = {&lt;BR /&gt; &amp;amp;_spi_dspi_devif, /* Low level driver interface */&lt;BR /&gt; &amp;amp;_bsp_dspi2_init, /* Low level driver init data */&lt;BR /&gt; { /* Default parameters: */&lt;BR /&gt; 10000000, /* Baudrate */&lt;BR /&gt; SPI_CLK_POL_PHA_MODE0, /* Mode */&lt;BR /&gt; 8, /* Frame size */&lt;BR /&gt; 1, /* Chip select */&lt;BR /&gt; DSPI_ATTR_USE_ISR, /* Attributes */&lt;BR /&gt; 0xFFFFFFFF /* Dummy pattern */&lt;BR /&gt; }&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;but if I use DMA based, how can I enable DMA interrupt?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please let me know.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Br,&lt;/P&gt;&lt;P&gt;Paul&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 09 Oct 2019 09:06:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/K61-SPI-over-DMA-using-MQX-I-O-peripheral-code-performance-issue/m-p/933472#M18290</guid>
      <dc:creator>jinspaul</dc:creator>
      <dc:date>2019-10-09T09:06:52Z</dc:date>
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