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    <title>topic Re: K20 MCG FLL Mode doesn't work. in MQX Software Solutions</title>
    <link>https://community.nxp.com/t5/MQX-Software-Solutions/K20-MCG-FLL-Mode-doesn-t-work/m-p/440041#M14712</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Mark,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Sorry for my delay.&lt;/P&gt;&lt;P&gt;In order to clone a BSP it is very important that you consider the factures and the core frequency; these should be very similar to the custom board. For example, if you want to create a BSP and PSP for a K20dx256z (100MHz) it is necessary to select the BSP and PSP for the TWR-K60D100M because the features and core frequency between both processors (k60 and k20) and the boards are very close.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please check the attached document (MQX™ RTOS BSP Porting Guide) , in page 11 you can find a tool, use this tool to find the closest MQX BSP to clone based on the Kinetis part number.&lt;/P&gt;&lt;P&gt;With this tool you can verify that the BSP you need to clone is the&amp;nbsp; TWR-K60D100M.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;All the problems that are occurring are due to the clock change you're doing. I am attaching a document (MQX_BSP_Porting_Example_User_Guide.pdf), this document shows an example (page 21), in this example, the BSP needs the clock source changed from a 50 MHz oscillator to an 8 MHz crystal. Also, the example changes the PLL output from 96 MHz to 48 MHz, to force a change to the USB clock dividers, and detail these steps.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Unfortunately I cannot provide an exact example or code, like you need because I don't have a board to test. Sorry for any inconvenience.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a nice day!&lt;/P&gt;&lt;P&gt;Sol&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 23 Sep 2015 23:22:24 GMT</pubDate>
    <dc:creator>soledad</dc:creator>
    <dc:date>2015-09-23T23:22:24Z</dc:date>
    <item>
      <title>K20 MCG FLL Mode doesn't work.</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/K20-MCG-FLL-Mode-doesn-t-work/m-p/440037#M14708</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Can't get K20 MCG FLL Mode to be selected (MCG_S = xxxx11xx instead of MCG_S = xxxx00xx).&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Details:&lt;/P&gt;&lt;P&gt;1) MQX 4.20:&lt;/P&gt;&lt;P&gt;2) Based on twrk20d72m tower software&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; a) tower schematic calls out the PK20DX256VLL7, while the chip used is MK20DX256VMC10.&amp;nbsp; Had to change the code to support this chip (MK20D10.h instead of MK20D7.h).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; b) RTC crystal is used to drive everything (XTAL32 and EXTAL32, 32.768Khz).&amp;nbsp;&amp;nbsp; XTAL0 and EXTAL0 are not connected.&amp;nbsp;&amp;nbsp; The code was changed to support this configuration (Processor Expert&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 10.4.0).&amp;nbsp; Attached is the bsp code change for the MCG FLL Mode change. &lt;/P&gt;&lt;P&gt;3) no external FLASH, DDR, or MRAM. &lt;/P&gt;&lt;P&gt;4) IAR IDE and I-Jet debugger (7.40 for ARM).&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Observed behaviors:&lt;/P&gt;&lt;P&gt;1) IAR IDE and I-Jet debugger seems to work.&lt;/P&gt;&lt;P&gt;2) most K20 register values (debugger) are 0xCDCDCDCD (e.g. MCG_xxx, RCM_xxxx, SIM_xxx).&amp;nbsp; Clearly this is not correct.&amp;nbsp; debugger artifact?&amp;nbsp; K20 problem?&amp;nbsp; The code does seem to read and&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; react to these values.&amp;nbsp;&amp;nbsp; Perhaps this problem is related to Reset signal (see below).&amp;nbsp;&amp;nbsp; The debugger claims the K20 registers are updated every second.&lt;/P&gt;&lt;P&gt;3) K20 Reset signal (J11) is toggling.&amp;nbsp; 65us period, low for 63us and high for 2us.&amp;nbsp;&amp;nbsp; WDOG is disabled.&amp;nbsp; Clock Monitors are disabled.&amp;nbsp; VDD is 3.3V.&amp;nbsp; Not using any low power modes.&amp;nbsp; Removing the&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; debugger doesn't change this behavior.&amp;nbsp;&amp;nbsp; Reset net is connected to JTAG (debugger) only, with a 10K pull-up. &lt;/P&gt;&lt;P&gt;4) Can't get K20 FLL Mode to be selected (MCG_S = xxxx11xx instead of MCG_S = xxxx00xx).&amp;nbsp;&amp;nbsp; Could be the 0xCDCDCDCD problem.&lt;/P&gt;&lt;P&gt;5) The XTAL32 and EXTAL32 pins have no voltages.&amp;nbsp;&amp;nbsp; I would expect about 1/2 voltage.&amp;nbsp; I don't think the crystal will oscillate with zero volts.&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;/P&gt;&lt;P&gt;I have checked the layout and schematic to make sure all the VDD and VSS are connected and found no problems.&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-338447"&gt;K20_bsp.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 10 Sep 2015 23:12:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/K20-MCG-FLL-Mode-doesn-t-work/m-p/440037#M14708</guid>
      <dc:creator>markkalior</dc:creator>
      <dc:date>2015-09-10T23:12:02Z</dc:date>
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    <item>
      <title>Re: K20 MCG FLL Mode doesn't work.</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/K20-MCG-FLL-Mode-doesn-t-work/m-p/440038#M14709</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Mark:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;OL style="list-style-type: upper-alpha;"&gt;&lt;LI&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri',sans-serif;"&gt;The closest MQX BSP to use as clone based for the MK20DX256VMC10 device is the TWR-K60D100M. So, you need to clone the TWR-K60D100M for your board. &lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri',sans-serif;"&gt;It is possible to change the clock configurations.&amp;nbsp; All MQX BSP's are PE capable and Processor Expert is integrated with CodeWarrior but it is also a standalone tool that can generate code for IAR, Keil, GCC, etc.&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri',sans-serif;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;A href="http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=PE_DRIVER_SUITE&amp;amp;tid=PEH"&gt;&lt;SPAN style="color: windowtext;"&gt;&lt;/SPAN&gt;&lt;/A&gt;&lt;A href="http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=PE_DRIVER_SUITE&amp;amp;tid=PEH" target="test_blank"&gt;http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=PE_DRIVER_SUITE&amp;amp;tid=PEH&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin-bottom: 0.0001pt;"&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri',sans-serif;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; In my opinion it is easier to generate the MCG functions using PE. If you don’t want to use PE you need to modify the bsp_cm.c file. Unfortunately I cannot to provide the exact changes because I don’t have a board in order to test these modifications. &lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin-bottom: 0.0001pt;"&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri',sans-serif;"&gt;You need to considerate the below information: &lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin-bottom: 0.0001pt;"&gt;&lt;/P&gt;&lt;UL style="list-style-type: disc;"&gt;&lt;LI&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri',sans-serif;"&gt;Check the bsp_cm.c file located at the path: C:\Freescale\Freescale_MQX_4_2\mqx\source\bsp\&amp;lt;name_board&amp;gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri',sans-serif;"&gt;Localize the void _bsp_initialize_hardware(void) function &lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri',sans-serif;"&gt;Modify this function according your needs. &lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;C. Less flash memory size is to be modified in the linker command file. The location of the linker file is at&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri',sans-serif;"&gt; c:\Freescale\Freescale_MQX_4_x\mqx\source\bsp\&amp;lt;platform&amp;gt;\cw\*.lcf.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin-bottom: 0.0001pt;"&gt;&lt;/P&gt;&lt;P style="margin-bottom: 0.0001pt;"&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri',sans-serif;"&gt;D. In my opinion the problems with the registers are due to incorrect settings in the BSP.&amp;nbsp; Please try with these modifications and let me know if this helps. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Sol&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 14 Sep 2015 20:31:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/K20-MCG-FLL-Mode-doesn-t-work/m-p/440038#M14709</guid>
      <dc:creator>soledad</dc:creator>
      <dc:date>2015-09-14T20:31:38Z</dc:date>
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    <item>
      <title>Re: K20 MCG FLL Mode doesn't work.</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/K20-MCG-FLL-Mode-doesn-t-work/m-p/440039#M14710</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;A).&amp;nbsp; I am reluctant to "start over", I have already spent a lot time getting here.&amp;nbsp;&amp;nbsp; I have been using Processor Expert.&amp;nbsp; I have attached my code for your review.&amp;nbsp; "_pe_initialize_hardware()" and "PE_low_level_init()", is where the PE code was inserted. I was hoping you could look at my code and tell me what is wrong.&amp;nbsp; I am using IAR.&lt;/P&gt;&lt;P&gt;B) I am using PE, see above.&lt;/P&gt;&lt;P&gt;C) I understand, see A)&lt;/P&gt;&lt;P&gt;D) Your response is trival.&amp;nbsp; I am aware that the code doesn't work, that's why I generated this content.&amp;nbsp; Telling me I have a mistake in my code isn't helpful.&amp;nbsp; What would be helpful, is for you to tell me what line of code is wrong.&amp;nbsp;&amp;nbsp; I taken PE code and insert it into "bsp_cm.c" attached, see A)&amp;nbsp;&amp;nbsp; ....or maybe I didn't setup PE correctly, you could run PE and see if it matches my PE code. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am not clear why starting over is quicker than fixing the one or two line of codes that is incorrect.&amp;nbsp;&amp;nbsp; PE code isn't going to change.&amp;nbsp;&amp;nbsp; Unless you are telling me twrk20d72m has bugs and its takes too long to debug it.&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 15 Sep 2015 14:42:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/K20-MCG-FLL-Mode-doesn-t-work/m-p/440039#M14710</guid>
      <dc:creator>markkalior</dc:creator>
      <dc:date>2015-09-15T14:42:22Z</dc:date>
    </item>
    <item>
      <title>Re: K20 MCG FLL Mode doesn't work.</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/K20-MCG-FLL-Mode-doesn-t-work/m-p/440040#M14711</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;1) I have tried numberous experiments and I can get past the while loops:&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* MCG_C1: CLKS=0,FRDIV=0,IREFS=0,IRCLKEN=1,IREFSTEN=0 */&lt;/P&gt;&lt;P&gt;&amp;nbsp; MCG_C1 = (MCG_C1_CLKS(0x00) | MCG_C1_FRDIV(0x00) | MCG_C1_IRCLKEN_MASK);&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* MCG_C4: DMX32=1,DRST_DRS=3 */&lt;/P&gt;&lt;P&gt;&amp;nbsp; MCG_C4 |= (MCG_C4_DMX32_MASK | MCG_C4_DRST_DRS(0x03));&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* MCG_C5: ??=0,PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0 */&lt;/P&gt;&lt;P&gt;&amp;nbsp; MCG_C5 = MCG_C5_PRDIV0(0x00);&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */&lt;/P&gt;&lt;P&gt;&amp;nbsp; MCG_C6 = MCG_C6_VDIV0(0x00);&lt;/P&gt;&lt;P&gt;&amp;nbsp; while((MCG_S &amp;amp; MCG_S_IREFST_MASK) != 0x00U) { /* Check that the source of the FLL reference clock is the external reference clock. */&lt;/P&gt;&lt;P&gt;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&amp;nbsp; while((MCG_S &amp;amp; 0x0CU) != 0x00U) {&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Wait until output of the FLL is selected */&lt;/P&gt;&lt;P&gt;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2) The code snippet above is from Processor Expert.&lt;/P&gt;&lt;P&gt;3) I have tried numberous experiments and I always have the same problem.&amp;nbsp;&amp;nbsp; Any know issues with Processor Expert?&lt;/P&gt;&lt;P&gt;4) I have studied the TWR-K60D100M and TWR-K20D72m and both don't have any code for Internal Clocks (FBI, FLL, bsp_cm.c,_xxx_initialize_hardware). &lt;/P&gt;&lt;P&gt;5) bsp_cm.c: _pe_initialize_hardware and _bsp_set_clock_configuration are doing the same thing.&amp;nbsp;&amp;nbsp; Why are both methods (or functions) called?&amp;nbsp;&amp;nbsp; Should I set the MCG twice?&lt;/P&gt;&lt;P&gt;6) I tried the AutoTrim, but got stuck in the while loop (why am I not surprised?). &lt;/P&gt;&lt;P&gt;7) any ideas?&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Sep 2015 15:19:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/K20-MCG-FLL-Mode-doesn-t-work/m-p/440040#M14711</guid>
      <dc:creator>markkalior</dc:creator>
      <dc:date>2015-09-16T15:19:41Z</dc:date>
    </item>
    <item>
      <title>Re: K20 MCG FLL Mode doesn't work.</title>
      <link>https://community.nxp.com/t5/MQX-Software-Solutions/K20-MCG-FLL-Mode-doesn-t-work/m-p/440041#M14712</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Mark,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Sorry for my delay.&lt;/P&gt;&lt;P&gt;In order to clone a BSP it is very important that you consider the factures and the core frequency; these should be very similar to the custom board. For example, if you want to create a BSP and PSP for a K20dx256z (100MHz) it is necessary to select the BSP and PSP for the TWR-K60D100M because the features and core frequency between both processors (k60 and k20) and the boards are very close.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please check the attached document (MQX™ RTOS BSP Porting Guide) , in page 11 you can find a tool, use this tool to find the closest MQX BSP to clone based on the Kinetis part number.&lt;/P&gt;&lt;P&gt;With this tool you can verify that the BSP you need to clone is the&amp;nbsp; TWR-K60D100M.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;All the problems that are occurring are due to the clock change you're doing. I am attaching a document (MQX_BSP_Porting_Example_User_Guide.pdf), this document shows an example (page 21), in this example, the BSP needs the clock source changed from a 50 MHz oscillator to an 8 MHz crystal. Also, the example changes the PLL output from 96 MHz to 48 MHz, to force a change to the USB clock dividers, and detail these steps.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Unfortunately I cannot provide an exact example or code, like you need because I don't have a board to test. Sorry for any inconvenience.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a nice day!&lt;/P&gt;&lt;P&gt;Sol&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 23 Sep 2015 23:22:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MQX-Software-Solutions/K20-MCG-FLL-Mode-doesn-t-work/m-p/440041#M14712</guid>
      <dc:creator>soledad</dc:creator>
      <dc:date>2015-09-23T23:22:24Z</dc:date>
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