ADC cross reference

MWMinor — Wed, 12 Aug 2015 09:12:10 GMT

Hi...

I hope I'm posting this to the right place, as my question really spans MQX and the bsp files related to the TWRK60 boards....

Is there a simple list or table somewhere that cross references the pin-out of a specific device to the pin of the ADC.

For example on the TWR-K60DM board, the potentiometer is connected to pin K2 which on the schematic is described as ADC1_DM1.

In the bsp.h file the input is defined as;

#define BSP_ADC_CH_POT (ADC1_SOURCE_AD20)...?

How do you relate the two...?

Thanks

Ken

Re: ADC cross reference

soledad — Wed, 12 Aug 2015 16:55:03 GMT

Hello Ken,

Please check the init_gpio.c file, this file is located at the path: C:\Freescale\Freescale_MQX_4_2\mqx\source\bsp\twrk60d100m

In this file you can find the function performs BSP-specific initialization related to ADC channel.

For example:

/*FUNCTION*-------------------------------------------------------------------

* Function Name : _bsp_adc_io_init

* Returned Value : 0 for success, -1 for failure

* Comments :

* This function performs BSP-specific initialization related to ADC

*END*----------------------------------------------------------------------*/

_mqx_int _bsp_adc_io_init

(

/* [IN] number of ADC device on which to perform hardware initialization */

_mqx_uint adc_num

)

{

SIM_MemMapPtr sim_ptr = SIM_BASE_PTR;

/* Enable ADC clocks */

if (adc_num == 0)

sim_ptr->SCGC6 |= SIM_SCGC6_ADC0_MASK;

else if (adc_num == 1)

sim_ptr->SCGC3 |= SIM_SCGC3_ADC1_MASK;

else

return IO_ERROR;

return IO_OK;

}

/*FUNCTION*-------------------------------------------------------------------

* Function Name : _bsp_adc_channel_io_init

* Returned Value : 0 for success, -1 for failure

* Comments :

* This function performs BSP-specific initialization related to ADC channel

*END*----------------------------------------------------------------------*/

_mqx_int _bsp_adc_channel_io_init

(

/* [IN] number of channel on which to perform hardware initialization */

uint16_t source

)

{

uint8_t ch = ADC_GET_CHANNEL(source);

uint8_t gpio_port;

PORT_MemMapPtr pctl = NULL;

#define ADC_SIG_PORTA (0x01 << 5)

#define ADC_SIG_PORTB (0x02 << 5)

#define ADC_SIG_PORTC (0x03 << 5)

#define ADC_SIG_PORTD (0x04 << 5)

#define ADC_SIG_PORTE (0x05 << 5)

#define ADC_SIG_NA (0x00) /* signal not available */

#define ADC_SIG_NC (0x01) /* signal not configurable */

/* Conversion table for ADC0x inputs, where x is 0 to 23, mux is defaultly "B" */

const static uint8_t adc0_conv_table[] = {

ADC_SIG_NC, /* 0 leave as default */

ADC_SIG_NC, /* 1 leave as default */

ADC_SIG_NC, /* 2 leave as default */

ADC_SIG_NC, /* 3 leave as default */

ADC_SIG_PORTC | 2, /* 4b */

ADC_SIG_PORTD | 1, /* 5b */

ADC_SIG_PORTD | 5, /* 6b */

ADC_SIG_PORTD | 6, /* 7b */

ADC_SIG_PORTB | 0, /* 8 */

ADC_SIG_PORTB | 1, /* 9 */

ADC_SIG_PORTA | 7, /* 10 */

ADC_SIG_PORTA | 8, /* 11 */

ADC_SIG_PORTB | 2, /* 12 */

ADC_SIG_PORTB | 3, /* 13 */

ADC_SIG_PORTC | 0, /* 14 */

ADC_SIG_PORTC | 1, /* 15 */

ADC_SIG_NC, /* 16 conflict in K60 Sub-Family Reference Manual, Rev. 5, table 3.7.1.3.1 and 10.3.1 */

ADC_SIG_PORTE | 24, /* 17 */

ADC_SIG_PORTE | 25, /* 18 */

ADC_SIG_NC, /* 19 ADC0_DM0, leave as default */

ADC_SIG_NC, /* 20 ADC0_DM1, leave as default */

ADC_SIG_NC, /* 21 conflict in K60 Sub-Family Reference Manual, Rev. 5, table 3.7.1.3.1 and 10.3.1 */

ADC_SIG_NC, /* 22 conflict in K60 Sub-Family Reference Manual, Rev. 5, table 3.7.1.3.1 and 10.3.1 */

ADC_SIG_NC, /* 23 DAC0, leave as default */

ADC_SIG_NA, /* 24 not implemented */

ADC_SIG_NA, /* 25 not implemented */

/* below: use ADC_SIG_NC (leave as default) */

};

/* Conversion table for ADC1x, where x is 0 to 23, mux is defaultly "B" (or nothing) */

const static uint8_t adc1_conv_tableB[] = {

ADC_SIG_NC, /* 0 leave as default */

ADC_SIG_NC, /* 1 leave as default */

ADC_SIG_NC, /* 2 leave as default */

ADC_SIG_NC, /* 3 leave as default */

ADC_SIG_PORTC | 8, /* 4b */

ADC_SIG_PORTC | 9, /* 5b */

ADC_SIG_PORTC | 10, /* 6b */

ADC_SIG_PORTC | 11, /* 7b */

ADC_SIG_PORTB | 0, /* 8 */

ADC_SIG_PORTB | 1, /* 9 */

ADC_SIG_PORTB | 4, /* 10 */

ADC_SIG_PORTB | 5, /* 11 */

ADC_SIG_PORTB | 6, /* 12 */

ADC_SIG_PORTB | 7, /* 13 */

ADC_SIG_PORTB | 10, /* 14 */

ADC_SIG_PORTB | 11, /* 15 */

ADC_SIG_NC, /* 16 */

ADC_SIG_PORTA | 17, /* 17 */

ADC_SIG_NC, /* 18 VREF, leave as default */

ADC_SIG_NC, /* 19 ADC1_DM0, leave as default */

ADC_SIG_NC, /* 20 ADC1_DM1, leave as default */

ADC_SIG_NA, /* 21 not implemented */

ADC_SIG_NA, /* 22 not implemented */

ADC_SIG_NC, /* 23 DAC1, leave as default */

ADC_SIG_NA, /* 24 not implemented */

ADC_SIG_NA, /* 25 not implemented */

/* below: use ADC_SIG_NC (leave as default) */

};

/* Conversion table for ADC1x, where x is 4 to 7, mux is "A" */

const static uint8_t adc1_conv_tableA[] = {

ADC_SIG_PORTE | 0, /* 4a */

ADC_SIG_PORTE | 1, /* 5a */

ADC_SIG_PORTE | 2, /* 6a */

ADC_SIG_PORTE | 3, /* 7a */

};

if (ADC_GET_DIFF(source) && ch > 3)

return IO_ERROR; /* signal not available */

if (ADC_GET_DIFF(source) == 0 && ch == 2)

return IO_ERROR; /* channel 2 (PGA) can be used only as a diff pair */

if (ch < 26) {

if (ADC_GET_MODULE(source) == ADC_SOURCE_MODULE(1)) {

/* Get result for module 0 */

gpio_port = adc0_conv_table[ch];

}

else {

if ((ADC_GET_MUXSEL(source) == ADC_SOURCE_MUXSEL_B) || (ADC_GET_MUXSEL(source) == ADC_SOURCE_MUXSEL_X))

/* Get result for module 1, if user wants "B" channel or any channel */

gpio_port = adc1_conv_tableB[ch];

else {

/* Get result for module 1, if user wants "A" channel or any other */

if (ch < 4 || ch > 7)

gpio_port = ADC_SIG_NA;

else

gpio_port = adc1_conv_tableA[ch - 4];

}

else

gpio_port = ADC_SIG_NC;

if (gpio_port == ADC_SIG_NA)

return IO_ERROR; /* signal not available */

if (gpio_port == ADC_SIG_NC)

return IO_OK; /* no need to configure signal */

switch (gpio_port >> 5) {

case 1: /* PORTA */

pctl = (PORT_MemMapPtr) PORTA_BASE_PTR;

break;

case 2: /* PORTB */

pctl = (PORT_MemMapPtr) PORTB_BASE_PTR;

break;

case 3: /* PORTC */

pctl = (PORT_MemMapPtr) PORTC_BASE_PTR;

break;

case 4: /* PORTD */

pctl = (PORT_MemMapPtr) PORTD_BASE_PTR;

break;

case 5: /* PORTE */

pctl = (PORT_MemMapPtr) PORTE_BASE_PTR;

break;

/* There is no possibility to get other port from table */

}

pctl->PCR[gpio_port & 0x1F] &= ~PORT_PCR_MUX_MASK; /* set pin's multiplexer to analog */

return IO_OK;

}

Have a great day,

Sol

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