MCX MicrocontrollersのトピックRe: MCXN947 DLL auto-adjusted function not working

MCXN947 DLL auto-adjusted function not working

IbhDaniel — Thu, 24 Sep 2026 09:30:15 GMT

Hello,

I'm using the MCXN947 via FlexSPI with an OctalRAM (IS66WVO32M8DALL-200BLI).
The FlexSPI root clock is supplied at 150 MHz via PLL1, and since the RAM operates in DDR mode, I have an output clock rate of 75 MHz.
The `flexspi_device_config_t` has the following parameters:

flexspi_device_config_t psram_config = { .flexspiRootClk = 150000000U, .isSck2Enabled = false, .flashSize = OCTALRAM_ISSI_SIZE, .CSIntervalUnit = kFLEXSPI_CsIntervalUnit1SckCycle, .CSInterval = 2, .CSHoldTime = 2, .CSSetupTime = 2, .dataValidTime = 2, .columnspace = 4, .enableWordAddress = false, .AWRSeqIndex = HYPERRAM_CMD_LUT_SEQ_IDX_WRITEDATA, .AWRSeqNumber = 1, .ARDSeqIndex = HYPERRAM_CMD_LUT_SEQ_IDX_READDATA, .ARDSeqNumber = 1, .AHBWriteWaitUnit = kFLEXSPI_AhbWriteWaitUnit2AhbCycle, .AHBWriteWaitInterval = 0, .enableWriteMask = true, };

To initialize FlexSpi, I use the SDK FLEXSPI_DRIVER, version 2.6.0.
When I configure the delay cells using the auto-adjusted function (as described in the manual under section 10.3.15.6, “DLL configuration for sampling”) with the following values:
• SLVDLYTARGET=0x0F (divider 16/32 * root_clock = 3.33 ns)
• REFPHASEGAP=0x02
• DLLEN=0x01
• OVRDEN=0x01

After waiting for the ASLVLOCK and AREFLOCK lock bits, I get 0x01 for ASLVSEL and 0x00 for AREFSEL. Consequently, the RAM's read and write functions do not work, since the set delay time is approximately 120 ps!

/* Configure DLL. */ configValue = FLEXSPI_CalculateDll(base, config); base->DLLCR[index] = configValue; /* DLL neu kalibrieren */ base->DLLCR[0] |= FLEXSPI_DLLCR_DLLRESET_MASK; base->DLLCR[0] &= ~FLEXSPI_DLLCR_DLLRESET_MASK; /* Exit stop mode. */ base->MCR0 &= ~FLEXSPI_MCR0_MDIS_MASK; /* Lock abwarten */ while ((base->STS2 & (FLEXSPI_STS2_AREFLOCK_MASK | FLEXSPI_STS2_ASLVLOCK_MASK)) != (FLEXSPI_STS2_AREFLOCK_MASK | FLEXSPI_STS2_ASLVLOCK_MASK)) { } SDK_DelayAtLeastUs(10U, CLOCK_GetCoreSysClkFreq());

Even if I use different values for SLVDLYTARGET, the output of ASLVLOCK and AREFLOCK does not change.
However, if I set the delay time to a fixed value using the registers OVRDEN=0x01 and OVRDVAL=0x1b (corresponding to a delay time of approximately 3.36 ns), reading from and writing to RAM works without any problems.

However, since the root clock is greater than 100 MHz, NXP recommends using the DLL's auto-adjustment feature.

Unfortunately, it doesn't seem to be able to determine the correct delay time!

Re: MCXN947 DLL auto-adjusted function not working

carlos_o — Fri, 25 Sep 2026 20:32:46 GMT

Hi @IbhDaniel

Thank you for the post!

The MCXNx4 Reference Manual indicates that the serial root clock is the FlexSPI core clock (see Table 79. Clock Usage). In your case, this clock is configured to 150 MHz.

I also see that you have implemented the DLL sampling configuration, and the auto-calibration path appears to be the correct approach. The settings SLVDLYTARGET = 0x0F and DLLEN = 0x01 were configured correctly. The only issue identified was OVRDEN = 0x01 instead of 0x00, which disables the auto-calibration output path and causes ASLVSEL = 0x01 and AREFSEL = 0x00 regardless of the SLVDLYTARGET value.

I would just like to confirm that the above analysis applies to your implementation. Could you please verify that: MCR0[RXCLKSRC] = 3h (Flash-memory-provided read strobe and input from DQS pad) is being used in your configuration?

Re: MCXN947 DLL auto-adjusted function not working

IbhDaniel — Tue, 29 Sep 2026 07:09:46 GMT

Hi Carlos,

Thanks for your reply.
Sorry, that was a typo on my part, I set the OVRDEN bit to 0. In the screenshot of the MCU register, you can also see that OVRDEN was set to value 0.

I’m using the OctalRam IS66WVO32M8DALL-200BLI, if I understand correctly, this module sends the DQS signal to the MCU.

Re: MCXN947 DLL auto-adjusted function not working

carlos_o — Thu, 01 Oct 2026 00:08:47 GMT

Hi @IbhDaniel,

Could you please verify that MCR0[RXCLKSRC] = 3h (Flash-memory-provided read strobe input from the DQS pad) is being used in your configuration?

This point is important because auto-adjustment/calibration is only supported when the DQS signal is sourced from the external DQS pad. If a different RXCLKSRC setting is selected, the automatic delay adjustment mechanism will not operate as expected.

Re: MCXN947 DLL auto-adjusted function not working

IbhDaniel — Thu, 01 Oct 2026 12:32:33 GMT

I checked it again, and the MCR0[RXCLKSRC] bit is set to 3h in the MCU.

Re: MCXN947 DLL auto-adjusted function not working

carlos_o — Fri, 02 Oct 2026 21:17:17 GMT

Hi @IbhDaniel

Thank you for the confirmation, I'll review this with the internal team. This may take some time. We appreciate your patience.

In the meanwhile, please use the workaround you find doing the manual calibration.

Apologize the inconvenience this may cause.

Re: MCXN947 DLL auto-adjusted function not working

carlos_o — Tue, 06 Oct 2026 22:59:16 GMT

Hi @IbhDaniel,

Could you please share your flexspi_config_t?

This to replicate the behavior you are facing.

Also, try adding SDK_DelayAtLeastUs of 10us after UpdateDllValue and after FLEXSPI_SetFlashConfig()

Re: MCXN947 DLL auto-adjusted function not working

IbhDaniel — Mon, 12 Oct 2026 08:57:39 GMT

Hi Carlos,

Here is the information on the parameters I use with the `flexspi_config_t` structure:

flexspi_config_t config; /* Get FLEXSPI default settings and configure the flexspi. */ FLEXSPI_GetDefaultConfig(&config); config.rxSampleClock = kFLEXSPI_ReadSampleClkExternalInputFromDqsPad; /*Set AHB buffer size for reading data through AHB bus. */ config.ahbConfig.enableAHBPrefetch = true; config.ahbConfig.enableAHBBufferable = true; config.ahbConfig.enableAHBCachable = true; config.ahbConfig.enableReadAddressOpt = true; for (uint8_t i = 1; i < FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNT - 1; i++) { config.ahbConfig.buffer[i].bufferSize = 0; } config.ahbConfig.buffer[0].masterIndex = 4; /* DMA0 */ config.ahbConfig.buffer[0].bufferSize = 512; /* Allocate 512B bytes for DMA0 */ config.ahbConfig.buffer[0].enablePrefetch = true; config.ahbConfig.buffer[0].priority = 0; /* All other masters use last buffer with 512B bytes. */ config.ahbConfig.buffer[FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNT - 1].bufferSize = 512; #if !(defined(FSL_FEATURE_FLEXSPI_HAS_NO_MCR0_COMBINATIONEN) && FSL_FEATURE_FLEXSPI_HAS_NO_MCR0_COMBINATIONEN) config.enableCombination = true; #endif FLEXSPI_Init(BUNNY_FLEXSPI, &config);

And here is the code for the “SDK_DelayAtLeastUs” and “FLEXSPI_SetFlashConfig” functions:

SDK_DelayAtLeastUs(10U, CLOCK_GetCoreSysClkFreq()); /*! * @brief Delay at least for some time. * Please note that, if not uses DWT, this API will use while loop for delay, different run-time environments have * effect on the delay time. If precise delay is needed, please enable DWT delay. The two parmeters delayTime_us and * coreClock_Hz have limitation. For example, in the platform with 1GHz coreClock_Hz, the delayTime_us only supports * up to 4294967 in current code. If long time delay is needed, please implement a new delay function. * * @Param delayTime_us Delay time in unit of microsecond. * @Param coreClock_Hz Core clock frequency with Hz. */ void SDK_DelayAtLeastUs(uint32_t delayTime_us, uint32_t coreClock_Hz) { uint64_t count; if (delayTime_us > 0U) { count = USEC_TO_COUNT(delayTime_us, coreClock_Hz); assert(count <= UINT32_MAX); #if defined(SDK_DELAY_USE_DWT) && defined(DWT) /* Use DWT for better accuracy */ MSDK_EnableCpuCycleCounter(); /* Calculate the count ticks. */ count += MSDK_GetCpuCycleCount(); if (count > UINT32_MAX) { count -= UINT32_MAX; /* Wait for cyccnt overflow. */ while (count < MSDK_GetCpuCycleCount()) { } } /* Wait for cyccnt reach count value. */ while (count > MSDK_GetCpuCycleCount()) { } #else /* Divide value may be different in various environment to ensure delay is precise. * Every loop count includes three instructions, due to Cortex-M7 sometimes executes * two instructions in one period, through test here set divide 1.5. Other M cores use * divide 4. By the way, divide 1.5 or 4 could let the count lose precision, but it does * not matter because other instructions outside while loop is enough to fill the time. */ #if (__CORTEX_M == 7) count = count / 3U * 2U; #else count = count / 4U; #endif DelayLoop((uint32_t)count); #endif /* defined(SDK_DELAY_USE_DWT) && defined(DWT) */ } } /*! * brief Configures the connected device parameter. * * This function configures the connected device relevant parameters, such as the size, command, and so on. * The flash configuration value cannot have a default value. The user needs to configure it according to the * connected device. * * param base FLEXSPI peripheral base address. * param config Flash configuration parameters. * param port FLEXSPI Operation port. */ void FLEXSPI_SetFlashConfig(FLEXSPI_Type *base, flexspi_device_config_t *config, flexspi_port_t port) { uint32_t configValue = 0; uint8_t index = (uint8_t)port >> 1U; /* PortA with index 0, PortB with index 1. */ /* Wait for bus to be idle before changing flash configuration. */ while (!FLEXSPI_GetBusIdleStatus(base)) { } /* Configure flash size and address shift. */ #if defined(FSL_FEATURE_FLEXSPI_SUPPORT_ADDRESS_SHIFT) && (FSL_FEATURE_FLEXSPI_SUPPORT_ADDRESS_SHIFT) base->FLSHCR0[port] = config->flashSize | FLEXSPI_FLSHCR0_ADDRSHIFT(config->addressShift); #else base->FLSHCR0[port] = config->flashSize; #endif /* FSL_FEATURE_FLEXSPI_SUPPORT_ADDRESS_SHIFT */ /* Configure flash parameters. */ base->FLSHCR1[port] = FLEXSPI_FLSHCR1_CSINTERVAL(config->CSInterval) | FLEXSPI_FLSHCR1_CSINTERVALUNIT(config->CSIntervalUnit) | FLEXSPI_FLSHCR1_TCSH(config->CSHoldTime) | FLEXSPI_FLSHCR1_TCSS(config->CSSetupTime) | FLEXSPI_FLSHCR1_CAS(config->columnspace) | FLEXSPI_FLSHCR1_WA(config->enableWordAddress); /* Configure AHB operation items. */ configValue = base->FLSHCR2[port]; configValue &= ~(FLEXSPI_FLSHCR2_AWRWAITUNIT_MASK | FLEXSPI_FLSHCR2_AWRWAIT_MASK | FLEXSPI_FLSHCR2_AWRSEQNUM_MASK | FLEXSPI_FLSHCR2_AWRSEQID_MASK | FLEXSPI_FLSHCR2_ARDSEQNUM_MASK | FLEXSPI_FLSHCR2_ARDSEQID_MASK); configValue |= FLEXSPI_FLSHCR2_AWRWAITUNIT(config->AHBWriteWaitUnit) | FLEXSPI_FLSHCR2_AWRWAIT(config->AHBWriteWaitInterval); if (config->AWRSeqNumber > 0U) { configValue |= FLEXSPI_FLSHCR2_AWRSEQID((uint32_t)config->AWRSeqIndex) | FLEXSPI_FLSHCR2_AWRSEQNUM((uint32_t)config->AWRSeqNumber - 1U); } if (config->ARDSeqNumber > 0U) { configValue |= FLEXSPI_FLSHCR2_ARDSEQID((uint32_t)config->ARDSeqIndex) | FLEXSPI_FLSHCR2_ARDSEQNUM((uint32_t)config->ARDSeqNumber - 1U); } base->FLSHCR2[port] = configValue; /* Configure DLL. */ FLEXSPI_UpdateDllValue(base, config, port); /* Step into stop mode. */ base->MCR0 |= FLEXSPI_MCR0_MDIS_MASK; /* Configure write mask. */ if (config->enableWriteMask) { base->FLSHCR4 &= ~FLEXSPI_FLSHCR4_WMOPT1_MASK; } else { base->FLSHCR4 |= FLEXSPI_FLSHCR4_WMOPT1_MASK; } if (index == 0U) /*PortA*/ { base->FLSHCR4 &= ~FLEXSPI_FLSHCR4_WMENA_MASK; base->FLSHCR4 |= FLEXSPI_FLSHCR4_WMENA(config->enableWriteMask); } #if !((defined(FSL_FEATURE_FLEXSPI_HAS_NO_FLSHCR4_WMENB)) && (FSL_FEATURE_FLEXSPI_HAS_NO_FLSHCR4_WMENB)) else { base->FLSHCR4 &= ~FLEXSPI_FLSHCR4_WMENB_MASK; base->FLSHCR4 |= FLEXSPI_FLSHCR4_WMENB(config->enableWriteMask); } #endif /* Exit stop mode. */ base->MCR0 &= ~FLEXSPI_MCR0_MDIS_MASK; /* Wait for bus to be idle before use it access to external flash. */ while (!FLEXSPI_GetBusIdleStatus(base)) { } }

Thank you very much for your great support!

Best regards,

Daniel