topic Re: When using the FRDM-MCXN947's I3C interface for I2C communication, the Clk stretching capability in MCX Microcontrollers

When using the FRDM-MCXN947's I3C interface for I2C communication, the Clk stretching capability fai

kevin_Jhuang — Thu, 08 Oct 2026 02:34:26 GMT

Hello, I'm currently encountering a problem: I want to use the I3C interface of the FRDM-MCXN947 for I2C communication,but the slave device I'm connecting to experiences clock stretching during data preparation,so I have to wait for the slave device to release the SCL signal before data transfer can begin.

I've tried using the configurable registers (such as MCONFIG[SKEW] = 0, MCONFIG[HKEEP] = 0b11, MCONFIG[MSTENA] = 0b11) from the MCXNP184M150F70RM reference file, but it doesn't seem to be working. How can I resolve this?

#FRDM-MCXN947 #I3C

Re: When using the FRDM-MCXN947's I3C interface for I2C communication, the Clk stretching capability

Harry_Zhang — Fri, 09 Oct 2026 02:51:15 GMT

Hi @kevin_Jhuang

The register settings are currently applied before I3C_MasterInit(), so they may be overwritten by the SDK initialization.

Please enable:

masterConfig->disableTimeout = true;

Then configure MSTENA = 3, HKEEP = 3, and SKEW = 0 after I3C_MasterInit(). Please clear the corresponding register fields before writing them instead of using |=.

After initialization, please read back MCONFIG to verify that the settings are still active. Also provide the MSTATUS and MERRWARN values captured immediately after the clock-stretching failure.

Please also confirm that SCL and SDA are configured for open-drain operation and that external pull-up resistors are installed.

Harry

Re: When using the FRDM-MCXN947's I3C interface for I2C communication, the Clk stretching capability

kevin_Jhuang — Mon, 12 Oct 2026 08:00:21 GMT

Hi Harry:

Thank you very much for your reply. I have tried setting MCONFIG again for testing.

1. In the test, disableTimeout was set to true.

2. The image shows the current register settings, including the values of MCONFIG, MSTATUS, and MERRWARN, as well as the I2C bus signal. (The difference between configuration A and configuration B is the setting of MSTENA: Configuration A: MCONFIG[MSTENA] = 3, Configuration B: MCONFIG[MSTENA] = 1).

3. The SDA/SCL IO pins should be set to openDrainEnable = kPORT_OpenDrainDisable as per the example, and pull-up resistors(4.7K) should be present.

Currently, it seems that the I2C bus stretching function cannot be implemented.

Re: When using the FRDM-MCXN947's I3C interface for I2C communication, the Clk stretching capability

kevin_Jhuang — Mon, 12 Oct 2026 07:50:31 GMT

Following the above reply，configure B picture

Thank you

Re: When using the FRDM-MCXN947's I3C interface for I2C communication, the Clk stretching capability

Harry_Zhang — Wed, 14 Oct 2026 07:47:52 GMT

Hi @kevin_Jhuang

I can reproduce the issue and will continue investigating it. I will update you once I have any findings.

Harry