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    <title>MCX Microcontrollers中的主题 Resets from unknown sources MCXN947</title>
    <link>https://community.nxp.com/t5/MCX-Microcontrollers/Resets-from-unknown-sources-MCXN947/m-p/2414386#M5926</link>
    <description>&lt;P&gt;I have a device with an MCXN947.&amp;nbsp; It's running FreeRTOS.&amp;nbsp; Using LPTMR, it periodically goes into power-down mode, wakes up on the timer interrupt, maybe does a few things, then goes back into power-down mode.&amp;nbsp; Something like this:&lt;/P&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;vTaskSuspendAll&lt;/SPAN&gt;&lt;SPAN&gt;();&amp;nbsp; &amp;nbsp; &amp;nbsp; // FreeRTOS&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;PM_EnterLowPower&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;); // LPTMR interrupt will wake us up&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;xTaskResumeAll&lt;/SPAN&gt;&lt;SPAN&gt;();&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;// FreeRTOS&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;&lt;BR /&gt;There's really only one other task running when it wakes up and it does some I2C comms.&lt;BR /&gt;&lt;BR /&gt;The problem is that the processor occasionally resets (can't reliably reproduce).&amp;nbsp; The CMC SRS register reads 0x00004010, a warm SW reset.&amp;nbsp; Code isn't calling reset anywhere, maybe NXP's assert() or FreeRTOS's configASSERT().&lt;BR /&gt;&lt;BR /&gt;Are there other internal sources could be causing a SW reset?&lt;/P&gt;</description>
    <pubDate>Thu, 17 Sep 2026 16:55:15 GMT</pubDate>
    <dc:creator>robert_hines</dc:creator>
    <dc:date>2026-09-17T16:55:15Z</dc:date>
    <item>
      <title>Resets from unknown sources MCXN947</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/Resets-from-unknown-sources-MCXN947/m-p/2414386#M5926</link>
      <description>&lt;P&gt;I have a device with an MCXN947.&amp;nbsp; It's running FreeRTOS.&amp;nbsp; Using LPTMR, it periodically goes into power-down mode, wakes up on the timer interrupt, maybe does a few things, then goes back into power-down mode.&amp;nbsp; Something like this:&lt;/P&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;vTaskSuspendAll&lt;/SPAN&gt;&lt;SPAN&gt;();&amp;nbsp; &amp;nbsp; &amp;nbsp; // FreeRTOS&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;PM_EnterLowPower&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;); // LPTMR interrupt will wake us up&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;xTaskResumeAll&lt;/SPAN&gt;&lt;SPAN&gt;();&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;// FreeRTOS&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;&lt;BR /&gt;There's really only one other task running when it wakes up and it does some I2C comms.&lt;BR /&gt;&lt;BR /&gt;The problem is that the processor occasionally resets (can't reliably reproduce).&amp;nbsp; The CMC SRS register reads 0x00004010, a warm SW reset.&amp;nbsp; Code isn't calling reset anywhere, maybe NXP's assert() or FreeRTOS's configASSERT().&lt;BR /&gt;&lt;BR /&gt;Are there other internal sources could be causing a SW reset?&lt;/P&gt;</description>
      <pubDate>Thu, 17 Sep 2026 16:55:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/Resets-from-unknown-sources-MCXN947/m-p/2414386#M5926</guid>
      <dc:creator>robert_hines</dc:creator>
      <dc:date>2026-09-17T16:55:15Z</dc:date>
    </item>
    <item>
      <title>Re: Resets from unknown sources MCXN947</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/Resets-from-unknown-sources-MCXN947/m-p/2414393#M5927</link>
      <description>Would this errata (MCXN_1P02G) cause resets?&lt;BR /&gt;&lt;BR /&gt;ERR051704 DCDC: Failure changing to Low drive-strength mode</description>
      <pubDate>Thu, 17 Sep 2026 17:52:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/Resets-from-unknown-sources-MCXN947/m-p/2414393#M5927</guid>
      <dc:creator>robert_hines</dc:creator>
      <dc:date>2026-09-17T17:52:15Z</dc:date>
    </item>
    <item>
      <title>Re: Resets from unknown sources MCXN947</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/Resets-from-unknown-sources-MCXN947/m-p/2414420#M5928</link>
      <description>&lt;P&gt;The SSRS register reads 0x00004430, so the RSTACK bit is set; could ERR051704 cause that?&lt;/P&gt;</description>
      <pubDate>Thu, 17 Sep 2026 22:05:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/Resets-from-unknown-sources-MCXN947/m-p/2414420#M5928</guid>
      <dc:creator>robert_hines</dc:creator>
      <dc:date>2026-09-17T22:05:15Z</dc:date>
    </item>
    <item>
      <title>Re: Resets from unknown sources MCXN947</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/Resets-from-unknown-sources-MCXN947/m-p/2414516#M5929</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/260376"&gt;@robert_hines&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;DIV&gt;Yes, it is very likely related.&lt;/DIV&gt;
&lt;DIV&gt;Please first refer to ERR051704 and ERR051993 for verification.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Alice_Yang_0-1789719190798.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/396559i5CF081B5CC028F17/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Alice_Yang_0-1789719190798.png" alt="Alice_Yang_0-1789719190798.png" /&gt;&lt;/span&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;/DIV&gt;
&lt;DIV&gt;Also, SSRS contains cumulative status information, so it should be analyzed together with the current SRS value.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;Thank you.&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;BR&lt;/DIV&gt;
&lt;DIV&gt;Alice&lt;/DIV&gt;</description>
      <pubDate>Fri, 18 Sep 2026 08:14:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/Resets-from-unknown-sources-MCXN947/m-p/2414516#M5929</guid>
      <dc:creator>Alice_Yang</dc:creator>
      <dc:date>2026-09-18T08:14:17Z</dc:date>
    </item>
    <item>
      <title>Re: Resets from unknown sources MCXN947</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/Resets-from-unknown-sources-MCXN947/m-p/2414640#M5930</link>
      <description>&lt;P&gt;Changing the active voltage to midvoltage (and high drive strength) and the low-power voltage to overdrive (and low drive strength) while dropping in and out of power-down mode once a second, did increase the number of resets, all of the form:&lt;BR /&gt;&lt;BR /&gt;SRS 0x00004010&lt;BR /&gt;SSRS 0x00004430&lt;BR /&gt;&lt;BR /&gt;It would be nice if NXP could describe the downstream effects of the errata so I could be more confident this is the source of these spurious resets.&lt;/P&gt;</description>
      <pubDate>Fri, 18 Sep 2026 14:16:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/Resets-from-unknown-sources-MCXN947/m-p/2414640#M5930</guid>
      <dc:creator>robert_hines</dc:creator>
      <dc:date>2026-09-18T14:16:23Z</dc:date>
    </item>
    <item>
      <title>Re: Resets from unknown sources MCXN947</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/Resets-from-unknown-sources-MCXN947/m-p/2415601#M5947</link>
      <description>&lt;P&gt;&lt;FONT face="times new roman,times"&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/260376"&gt;@robert_hines&lt;/a&gt;&amp;nbsp;&lt;/FONT&gt;&lt;/P&gt;
&lt;DIV&gt;
&lt;P&gt;&lt;FONT face="times new roman,times"&gt;Thanks for your testing and feedback.&lt;/FONT&gt;&lt;/P&gt;
&lt;P&gt;&lt;FONT face="times new roman,times"&gt;Based on your test results, the observed behavior is very similar to the issue described in ERR051704. While I'm sorry NXP does not currently provide a more detailed description of the downstream effects of this issue.&lt;/FONT&gt;&lt;/P&gt;
&lt;P&gt;&lt;FONT face="times new roman,times"&gt;I recommend validating the workaround provided in ERR051704.&lt;/FONT&gt;&lt;/P&gt;
&lt;P&gt;&lt;FONT face="times new roman,times"&gt;If you continue to experience any issues after applying the workaround, please feel free to contact me.&lt;/FONT&gt;&lt;/P&gt;
&lt;P&gt;&lt;FONT face="times new roman,times"&gt;Thank you.&lt;/FONT&gt;&lt;/P&gt;
&lt;P&gt;&lt;FONT face="times new roman,times"&gt;Alice&lt;/FONT&gt;&lt;/P&gt;
&lt;/DIV&gt;</description>
      <pubDate>Wed, 23 Sep 2026 09:09:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/Resets-from-unknown-sources-MCXN947/m-p/2415601#M5947</guid>
      <dc:creator>Alice_Yang</dc:creator>
      <dc:date>2026-09-23T09:09:18Z</dc:date>
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