topic IMX8QXP RAM ECC in MCX Microcontrollers

IMX8QXP RAM ECC

qwerty1123 — Wed, 19 Aug 2026 04:00:06 GMT

My i.MX 8QXP board is configured to use sideband ECC mode. Is there a Linux driver available that supports this and can detect ECC errors? I haven't found any ECC-related registers in the Applications Processor Reference Manual (PRM).

THANKS.

Re: IMX8QXP RAM ECC

gaurav_sharma — Wed, 19 Aug 2026 06:26:31 GMT

@qwerty1123
ECC can be enabled and errors can be detected by the DDRC hardware, but you should not expect an existing Linux EDAC driver for i.MX 8QXP sideband ECC unless you have a BSP/private patch outside the retrieved sources. A board-specific driver would need to map the DDRC ECC registers from AN13566, handle ECC_CORRECT_INT / ECC_NCORRECT_INT , read ECCSTAT / ECCERRCNT , clear through ECCCTL , and optionally register with the Linux EDAC framework.

The app note describes correctable, uncorrectable, and AP error interrupt enables and status handling through DDRC registers. So, you most probably have to write a custom driver for it.

Re: IMX8QXP RAM ECC

pengyong_zhang — Wed, 19 Aug 2026 07:03:40 GMT

Hi @qwerty1123

We have not yet released a verification module for ECC. You will need to write your own verification program. Please refer to the documentation below.

https://www.nxp.com/docs/en/application-note/AN13566.pdf

You can refer IMX8DXL RM about ECC register. imx8qxp and imx8dxl use the same DDRC IP.

B.R