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    <title>topic Using USB on Core 1 of LPC55S6X (Zephyr OS) in MCX Microcontrollers</title>
    <link>https://community.nxp.com/t5/MCX-Microcontrollers/Using-USB-on-Core-1-of-LPC55S6X-Zephyr-OS/m-p/2314207#M4819</link>
    <description>&lt;LI-SPOILER&gt;I am trying to figure out what needs to be done to assign a USB peripheral (device controller) to the CPU1 of LPC55S69 (LPCXPRESSO board)&lt;BR /&gt;&lt;BR /&gt;I am building a modified cdc-acm sample project. The main core (CPU0) is flashed with a build that enabled CPU1. I have no issues running code on CPU1. I can for example handle button presses. But USB hardware does not initialize correctly. For example I see that inside&amp;nbsp;USB_EhciPhyInit all writes to&amp;nbsp;usbPhyBase-&amp;gt;CTRL do not change its value from 0 (I am using Ozone debugger to look at the hardware registers).&lt;BR /&gt;&lt;BR /&gt;To summarize - it looks like both&lt;EM&gt; USBPHY and USBHSD register ignore writes from the driver.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/EM&gt;Things I've checked:&lt;BR /&gt;&lt;BR /&gt;1. Same project works on CPU0&lt;BR /&gt;2. USB controllers and USB RAM are disabled in the CPU0 project I use to initialize and start CPU1&lt;BR /&gt;3. USB controllers and USB RAM are enabled on CPU1&lt;BR /&gt;&lt;BR /&gt;Basically I hit the same SW path through the USB initialization as on&amp;nbsp; CPU0 except the peripherals seem to be dead - as if the clock was not enabled&lt;/LI-SPOILER&gt;</description>
    <pubDate>Sun, 08 Feb 2026 20:34:05 GMT</pubDate>
    <dc:creator>alexfeinman</dc:creator>
    <dc:date>2026-02-08T20:34:05Z</dc:date>
    <item>
      <title>Using USB on Core 1 of LPC55S6X (Zephyr OS)</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/Using-USB-on-Core-1-of-LPC55S6X-Zephyr-OS/m-p/2314207#M4819</link>
      <description>&lt;LI-SPOILER&gt;I am trying to figure out what needs to be done to assign a USB peripheral (device controller) to the CPU1 of LPC55S69 (LPCXPRESSO board)&lt;BR /&gt;&lt;BR /&gt;I am building a modified cdc-acm sample project. The main core (CPU0) is flashed with a build that enabled CPU1. I have no issues running code on CPU1. I can for example handle button presses. But USB hardware does not initialize correctly. For example I see that inside&amp;nbsp;USB_EhciPhyInit all writes to&amp;nbsp;usbPhyBase-&amp;gt;CTRL do not change its value from 0 (I am using Ozone debugger to look at the hardware registers).&lt;BR /&gt;&lt;BR /&gt;To summarize - it looks like both&lt;EM&gt; USBPHY and USBHSD register ignore writes from the driver.&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/EM&gt;Things I've checked:&lt;BR /&gt;&lt;BR /&gt;1. Same project works on CPU0&lt;BR /&gt;2. USB controllers and USB RAM are disabled in the CPU0 project I use to initialize and start CPU1&lt;BR /&gt;3. USB controllers and USB RAM are enabled on CPU1&lt;BR /&gt;&lt;BR /&gt;Basically I hit the same SW path through the USB initialization as on&amp;nbsp; CPU0 except the peripherals seem to be dead - as if the clock was not enabled&lt;/LI-SPOILER&gt;</description>
      <pubDate>Sun, 08 Feb 2026 20:34:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/Using-USB-on-Core-1-of-LPC55S6X-Zephyr-OS/m-p/2314207#M4819</guid>
      <dc:creator>alexfeinman</dc:creator>
      <dc:date>2026-02-08T20:34:05Z</dc:date>
    </item>
    <item>
      <title>Re: Using USB on Core 1 of LPC55S6X (Zephyr OS)</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/Using-USB-on-Core-1-of-LPC55S6X-Zephyr-OS/m-p/2315414#M4826</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/32624"&gt;@alexfeinman&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;On LPC55S69 the two M33 cores share the same peripherals, but CPU1 has no TrustZone, and by default many peripherals come up as Secure‑only.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://docs.zephyrproject.org/latest/boards/nxp/lpcxpresso55s69/doc/index.html" target="_blank"&gt;LPCXPRESSO55S69 — Zephyr Project Documentation&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Harry_Zhang_0-1770715804895.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/376336iB0C6129CCF5326CC/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Harry_Zhang_0-1770715804895.png" alt="Harry_Zhang_0-1770715804895.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Harry&lt;/P&gt;</description>
      <pubDate>Tue, 10 Feb 2026 09:30:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/Using-USB-on-Core-1-of-LPC55S6X-Zephyr-OS/m-p/2315414#M4826</guid>
      <dc:creator>Harry_Zhang</dc:creator>
      <dc:date>2026-02-10T09:30:17Z</dc:date>
    </item>
    <item>
      <title>Re: Using USB on Core 1 of LPC55S6X (Zephyr OS)</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/Using-USB-on-Core-1-of-LPC55S6X-Zephyr-OS/m-p/2317593#M4848</link>
      <description>&lt;P&gt;Thank you. If I understand your reply correctly, my choice is to either use non-secure build on CPU0 or to configure trust zone to allow CPU1 USB access somehow. Could you point me to any resources on how to achieve the latter in Zephyr?&lt;/P&gt;</description>
      <pubDate>Fri, 13 Feb 2026 06:33:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/Using-USB-on-Core-1-of-LPC55S6X-Zephyr-OS/m-p/2317593#M4848</guid>
      <dc:creator>alexfeinman</dc:creator>
      <dc:date>2026-02-13T06:33:49Z</dc:date>
    </item>
    <item>
      <title>Re: Using USB on Core 1 of LPC55S6X (Zephyr OS)</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/Using-USB-on-Core-1-of-LPC55S6X-Zephyr-OS/m-p/2321759#M4885</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/32624"&gt;@alexfeinman&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;CPU1 (the second Cortex‑M33 in LPC55S69) does NOT support TrustZone at all.&lt;/P&gt;
&lt;P&gt;You cannot "configure TrustZone to allow CPU1 USB access" in Zephyr.&lt;/P&gt;
&lt;P&gt;May i ask what is your goal?&lt;/P&gt;
&lt;DIV&gt;only USB device running on &lt;STRONG&gt;CPU1?&lt;/STRONG&gt;&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;BR&lt;/DIV&gt;
&lt;DIV&gt;Harry&lt;/DIV&gt;</description>
      <pubDate>Tue, 24 Feb 2026 07:40:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/Using-USB-on-Core-1-of-LPC55S6X-Zephyr-OS/m-p/2321759#M4885</guid>
      <dc:creator>Harry_Zhang</dc:creator>
      <dc:date>2026-02-24T07:40:25Z</dc:date>
    </item>
    <item>
      <title>Re: Using USB on Core 1 of LPC55S6X (Zephyr OS)</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/Using-USB-on-Core-1-of-LPC55S6X-Zephyr-OS/m-p/2338943#M5091</link>
      <description>&lt;P&gt;Apologies for late reply. Somehow notification emails ended up in junk folder.&lt;/P&gt;&lt;P&gt;My goal is to have the code handling the USB interface running on core 1, while core 0 is doing something unrelated. Essentially I want to use core 1 as a dedicated communication processor running multiple UART to USB bridges (4 total).&lt;/P&gt;</description>
      <pubDate>Wed, 25 Mar 2026 03:24:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/Using-USB-on-Core-1-of-LPC55S6X-Zephyr-OS/m-p/2338943#M5091</guid>
      <dc:creator>alexfeinman</dc:creator>
      <dc:date>2026-03-25T03:24:06Z</dc:date>
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