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  <channel>
    <title>topic Re: SAI module in Zephyr with FRDM-MCXN947 in MCX Microcontrollers</title>
    <link>https://community.nxp.com/t5/MCX-Microcontrollers/SAI-module-in-Zephyr-with-FRDM-MCXN947/m-p/2305871#M4794</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/259164"&gt;@raimbowgeddon&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;In&amp;nbsp;zephyr/boards/nxp/frdm_mcxn947/board.c&lt;/P&gt;
&lt;LI-CODE lang="markup"&gt;#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sai0)) || DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sai1))
        /* &amp;lt; Set up PLL1 */
        const pll_setup_t pll1_Setup = {
                .pllctrl = SCG_SPLLCTRL_SOURCE(1U) | SCG_SPLLCTRL_SELI(3U) |
                                 SCG_SPLLCTRL_SELP(1U),
                .pllndiv = SCG_SPLLNDIV_NDIV(25U),
                .pllpdiv = SCG_SPLLPDIV_PDIV(10U),
                .pllmdiv = SCG_SPLLMDIV_MDIV(256U),
                .pllRate = 24576000U};

        /* Configure PLL1 to the desired values */
        CLOCK_SetPLL1Freq(&amp;amp;pll1_Setup);
        /* Set PLL1 CLK0 divider to value 1 */
        CLOCK_SetClkDiv(kCLOCK_DivPLL1Clk0, 1U);
#endif&lt;/LI-CODE&gt;
&lt;P&gt;Did you set&amp;nbsp;&lt;/P&gt;
&lt;LI-CODE lang="markup"&gt;&amp;amp;sai1 {
    status = "okay";
};
&lt;/LI-CODE&gt;
&lt;P&gt;in overlay file?&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Harry&lt;/P&gt;</description>
    <pubDate>Wed, 04 Feb 2026 08:51:01 GMT</pubDate>
    <dc:creator>Harry_Zhang</dc:creator>
    <dc:date>2026-02-04T08:51:01Z</dc:date>
    <item>
      <title>SAI module in Zephyr with FRDM-MCXN947</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/SAI-module-in-Zephyr-with-FRDM-MCXN947/m-p/2304847#M4783</link>
      <description>&lt;P&gt;Hello everybody,&lt;/P&gt;&lt;P&gt;I recently bought the MCXN947 evaluation board for my company's project as it seemed a very suitable soc for our needs, and for its native support for Zephyr, our rtos of choice.&lt;/P&gt;&lt;P&gt;Im having troubles setting up I2S communications over SAI module to retrieve data from a mems microphone, this code already worked for another soc albeit of another semiconductor company.&lt;/P&gt;&lt;P&gt;From my understanding, the board out of the box has all R0s set correctly for having SAI1 signals mapped on the available pins, they only clash with the LPSPI6 pins, and as the .dtsi file suggests (frdm_mcxn947_mcxn947_cpu0.dtsi) i disabled the flexcomm6 node. The i left the .pinctrl invaried, and connected Word Select (FS) to PT3_19 and Bit clock (BCLK) to PT3_18 and finally Data line (D0) to PT3_21. With an oscilloscope, i can confirm that no signal is seen on the FS and BTCLK line after an issued I2S_TRIGGER_START with the i2s_trigger function&lt;/P&gt;&lt;P&gt;here follows the main.c:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;#include &amp;lt;stdio.h&amp;gt;
#include &amp;lt;zephyr/kernel.h&amp;gt;
#include &amp;lt;zephyr/drivers/gpio.h&amp;gt;
#include "math.h"

#include &amp;lt;zephyr/device.h&amp;gt;
#include &amp;lt;zephyr/drivers/i2s.h&amp;gt;
#include &amp;lt;zephyr/logging/log.h&amp;gt;

LOG_MODULE_REGISTER(Main);

/* 1000 msec = 1 sec */
#define SLEEP_TIME_MS   1000

/* The devicetree node identifier for the "led0" alias. */
#define LED0_NODE DT_ALIAS(led0)

/*
 * A build error on this line means your board is unsupported.
 * See the sample documentation for information on how to fix this.
 */
static const struct gpio_dt_spec led = GPIO_DT_SPEC_GET(LED0_NODE, gpios);

static const struct device* i2s_dev = DEVICE_DT_GET(DT_ALIAS(i2srx));

#define SAMPLE_RATE_HZ 48000
#define WORD_BITS 32
#define WORD_BYTES  4
#define CHANNELS 1
#define FRAME_BYTES (CHANNELS * WORD_BYTES)
#define I2S_RX_DURATION_MS 10
#define MEM_BLOCK_SIZE (SAMPLE_RATE_HZ * (CHANNELS * 0.001 * I2S_RX_DURATION_MS))
#define MEM_BLOCK_BYTESIZE (MEM_BLOCK_SIZE * WORD_BYTES)

K_MEM_SLAB_DEFINE(slab, (size_t)MEM_BLOCK_BYTESIZE, 3, 4);

int main(void)
{
	int ret;
	bool led_state = true;

	if (!gpio_is_ready_dt(&amp;amp;led)) {
		return 0;
	}

	ret = gpio_pin_configure_dt(&amp;amp;led, GPIO_OUTPUT_ACTIVE);
	if (ret &amp;lt; 0) {
		return 0;
	}

	struct i2s_config cfg = {
		.word_size = WORD_BITS,
		.channels = CHANNELS,
		.format = I2S_FMT_DATA_FORMAT_I2S,
		.options = I2S_OPT_BIT_CLK_MASTER | I2S_OPT_FRAME_CLK_MASTER,
		.frame_clk_freq = SAMPLE_RATE_HZ,
		.mem_slab = &amp;amp;slab,
		.block_size = MEM_BLOCK_BYTESIZE,
		.timeout = 1000,
	};

	ret = i2s_configure(i2s_dev, I2S_DIR_RX, &amp;amp;cfg);
	if (ret &amp;lt; 0) {
		LOG_ERR("FAILED");
		return -EIO;
	}

	ret = i2s_trigger(i2s_dev, I2S_DIR_RX, I2S_TRIGGER_START);
    if (ret &amp;lt; 0) {
      LOG_ERR("I2S Trigger start failed");
      return -EIO;
    }

	while (1) {
		void* blk;
		size_t blk_sz;
		int ret = i2s_read(i2s_dev, &amp;amp;blk, &amp;amp;blk_sz);
		if (ret != 0) {
			/* Why is there no data? */
			LOG_ERR("No data. %i", ret);
			return -EIO;
		}

		ret = gpio_pin_toggle_dt(&amp;amp;led);
		if (ret &amp;lt; 0) {
			return 0;
		}

		led_state = !led_state;
		printf("LED state: %s\n", led_state ? "ON" : "OFF");
		k_msleep(SLEEP_TIME_MS);
	}
	return 0;
}&lt;/LI-CODE&gt;&lt;P&gt;&lt;BR /&gt;the following is my overlay:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;/ {
    aliases {
        i2srx = &amp;amp;sai1;
    };
};

// See comment in frdm_mcxn947_mcxn947_cpu0.dtsi
&amp;amp;flexcomm6_lpspi6 {
	status = "disabled";
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;The following is my prj.conf&lt;/P&gt;&lt;LI-CODE lang="c"&gt;CONFIG_GPIO=y
CONFIG_I2S=y
CONFIG_DMA=y

CONFIG_DEBUG=y
CONFIG_LOG=y
CONFIG_I2S_LOG_LEVEL_DBG=y
CONFIG_DMA_LOG_LEVEL_DBG=y&lt;/LI-CODE&gt;&lt;P&gt;&lt;BR /&gt;To get a clearer picture im also attaching a .zip of the project, which is a simple blinky with added the baseline functions needed to retrieve data from the microphones, can someone please help out or direct me to something that could help understand the issue?&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 02 Feb 2026 22:34:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/SAI-module-in-Zephyr-with-FRDM-MCXN947/m-p/2304847#M4783</guid>
      <dc:creator>raimbowgeddon</dc:creator>
      <dc:date>2026-02-02T22:34:42Z</dc:date>
    </item>
    <item>
      <title>Re: SAI module in Zephyr with FRDM-MCXN947</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/SAI-module-in-Zephyr-with-FRDM-MCXN947/m-p/2305871#M4794</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/259164"&gt;@raimbowgeddon&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;In&amp;nbsp;zephyr/boards/nxp/frdm_mcxn947/board.c&lt;/P&gt;
&lt;LI-CODE lang="markup"&gt;#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sai0)) || DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(sai1))
        /* &amp;lt; Set up PLL1 */
        const pll_setup_t pll1_Setup = {
                .pllctrl = SCG_SPLLCTRL_SOURCE(1U) | SCG_SPLLCTRL_SELI(3U) |
                                 SCG_SPLLCTRL_SELP(1U),
                .pllndiv = SCG_SPLLNDIV_NDIV(25U),
                .pllpdiv = SCG_SPLLPDIV_PDIV(10U),
                .pllmdiv = SCG_SPLLMDIV_MDIV(256U),
                .pllRate = 24576000U};

        /* Configure PLL1 to the desired values */
        CLOCK_SetPLL1Freq(&amp;amp;pll1_Setup);
        /* Set PLL1 CLK0 divider to value 1 */
        CLOCK_SetClkDiv(kCLOCK_DivPLL1Clk0, 1U);
#endif&lt;/LI-CODE&gt;
&lt;P&gt;Did you set&amp;nbsp;&lt;/P&gt;
&lt;LI-CODE lang="markup"&gt;&amp;amp;sai1 {
    status = "okay";
};
&lt;/LI-CODE&gt;
&lt;P&gt;in overlay file?&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Harry&lt;/P&gt;</description>
      <pubDate>Wed, 04 Feb 2026 08:51:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/SAI-module-in-Zephyr-with-FRDM-MCXN947/m-p/2305871#M4794</guid>
      <dc:creator>Harry_Zhang</dc:creator>
      <dc:date>2026-02-04T08:51:01Z</dc:date>
    </item>
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