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    <title>MCX MicrocontrollersのトピックIMXRT595-EVK DSP and CM33 Peripheral Access Isolation</title>
    <link>https://community.nxp.com/t5/MCX-Microcontrollers/IMXRT595-EVK-DSP-and-CM33-Peripheral-Access-Isolation/m-p/2256110#M4467</link>
    <description>&lt;P&gt;Hi NXP community, I'm working with the MIMXRT595-EVK​ board (Cortex-M33 + Fusion F1 DSP dual-core system) and have a question about peripheral access between the two cores.&lt;BR /&gt;I'm developing a dual-core application where the CM33 acts as the main processor and the DSP handles real-time signal processing. After processing data, I'd like the DSP to directly control some peripherals (like GPIO/LEDs) to indicate status without involving the CM33 for every operation.&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 05 Dec 2025 11:09:10 GMT</pubDate>
    <dc:creator>wx1</dc:creator>
    <dc:date>2025-12-05T11:09:10Z</dc:date>
    <item>
      <title>IMXRT595-EVK DSP and CM33 Peripheral Access Isolation</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/IMXRT595-EVK-DSP-and-CM33-Peripheral-Access-Isolation/m-p/2256110#M4467</link>
      <description>&lt;P&gt;Hi NXP community, I'm working with the MIMXRT595-EVK​ board (Cortex-M33 + Fusion F1 DSP dual-core system) and have a question about peripheral access between the two cores.&lt;BR /&gt;I'm developing a dual-core application where the CM33 acts as the main processor and the DSP handles real-time signal processing. After processing data, I'd like the DSP to directly control some peripherals (like GPIO/LEDs) to indicate status without involving the CM33 for every operation.&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 05 Dec 2025 11:09:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/IMXRT595-EVK-DSP-and-CM33-Peripheral-Access-Isolation/m-p/2256110#M4467</guid>
      <dc:creator>wx1</dc:creator>
      <dc:date>2025-12-05T11:09:10Z</dc:date>
    </item>
    <item>
      <title>Re: IMXRT595-EVK DSP and CM33 Peripheral Access Isolation</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/IMXRT595-EVK-DSP-and-CM33-Peripheral-Access-Isolation/m-p/2256680#M4474</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/257485"&gt;@wx1&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;Thank you so much for your interest in our products and for using our community.&lt;/P&gt;
&lt;P&gt;Regarding your question, please refer to IMXRT500RM, chapter&amp;nbsp;2.6 AHB Peripherals.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/webapp/Download?colCode=IMXRT500RM" target="_blank"&gt;https://www.nxp.com/webapp/Download?colCode=IMXRT500RM&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="mayliu1_0-1765173907742.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/368876i7CD5DE7F38C3177E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="mayliu1_0-1765173907742.png" alt="mayliu1_0-1765173907742.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Wish it helps you.&lt;BR /&gt;If you still have question about it, please kindly let me know.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best Regards&lt;BR /&gt;MayLiu&lt;/P&gt;</description>
      <pubDate>Mon, 08 Dec 2025 06:06:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/IMXRT595-EVK-DSP-and-CM33-Peripheral-Access-Isolation/m-p/2256680#M4474</guid>
      <dc:creator>mayliu1</dc:creator>
      <dc:date>2025-12-08T06:06:23Z</dc:date>
    </item>
    <item>
      <title>Re: IMXRT595-EVK DSP and CM33 Peripheral Access Isolation</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/IMXRT595-EVK-DSP-and-CM33-Peripheral-Access-Isolation/m-p/2256705#M4475</link>
      <description>Thank you, the peripheral access address of both cores is the same, right?&lt;BR /&gt;I'm using zephyr and rt595, but I find that there is no device tree for peripherals in DSP, Is it my code version issue?</description>
      <pubDate>Mon, 08 Dec 2025 06:36:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/IMXRT595-EVK-DSP-and-CM33-Peripheral-Access-Isolation/m-p/2256705#M4475</guid>
      <dc:creator>wx1</dc:creator>
      <dc:date>2025-12-08T06:36:43Z</dc:date>
    </item>
    <item>
      <title>Re: IMXRT595-EVK DSP and CM33 Peripheral Access Isolation</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/IMXRT595-EVK-DSP-and-CM33-Peripheral-Access-Isolation/m-p/2257731#M4486</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/257485"&gt;@wx1&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;Thanks for your updated information.&lt;/P&gt;
&lt;P&gt;A1: Yes, it is right that&amp;nbsp;&amp;nbsp;the peripheral access address of both cores is the same. Please refer to RT500RM chapter2&amp;nbsp;Memory Maps&lt;/P&gt;
&lt;P&gt;A2: I do not think&amp;nbsp; it is&amp;nbsp; your code version issue,&amp;nbsp; Currently, Zephyr's support for the MIMXRT595 is mainly focused on the Cortex-M33 core.&lt;/P&gt;
&lt;P&gt;please create a new case for future issues. we will do our best to support you.&lt;/P&gt;
&lt;P&gt;Best Regards&lt;/P&gt;
&lt;P&gt;MayLiu&lt;/P&gt;</description>
      <pubDate>Tue, 09 Dec 2025 07:44:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/IMXRT595-EVK-DSP-and-CM33-Peripheral-Access-Isolation/m-p/2257731#M4486</guid>
      <dc:creator>mayliu1</dc:creator>
      <dc:date>2025-12-09T07:44:28Z</dc:date>
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