i.MX8MP - Enabling Inline ECC for 32bit LPDDR4

Rajashekar-Bommideni — Thu, 15 May 2025 12:43:01 GMT

Hi All,

I am working on enabling inline ECC for LPDDR4 on i.MX8M Plus.
I didn't find any document on the same.
Can anyone suggest.

Here is what i have done.
Using Config tool for i.MX, I have enabled inline ECC and got lpddr4_timing.c file. This file i have updated in my Yocto Based -Custom linux OS. and enabled inline ECC in u boot configuration.
also updated .dts file with "ecc-enable;" (as below)

memory@40000000 {
device_type = "memory";
reg = <0x0 0x40000000 0 0xc0000000>,
<0x1 0x00000000 0 0xc0000000>;
ecc-enable;
};

Still i dont see any ecc enabled on my device
validating below path to check the ECC is enabled or not (for ecc-mode)

/sys/devices/system/edac/mc/

Kindly guide me on this, what i am missing

- Raj

Re: i.MX8MP - Enabling Inline ECC for 32bit LPDDR4

JorgeCas — Thu, 15 May 2025 17:33:32 GMT

Hello,

Please take a look in the next document:

ECC on i.MX 8 Series

Best regards.

topic Re: i.MX8MP - Enabling Inline ECC for 32bit LPDDR4 in MCX Microcontrollers

i.MX8MP - Enabling Inline ECC for 32bit LPDDR4

Re: i.MX8MP - Enabling Inline ECC for 32bit LPDDR4