<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Assistance Needed with SPI Communication Between IMXRT1064 (Slave) and SAMA5D4 (Master) in MCX Microcontrollers</title>
    <link>https://community.nxp.com/t5/MCX-Microcontrollers/Assistance-Needed-with-SPI-Communication-Between-IMXRT1064-Slave/m-p/2024324#M2316</link>
    <description>&lt;P&gt;Hello again &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/244801"&gt;@Jayaganesh&lt;/a&gt;,&lt;BR /&gt;In order to set lpspi2 clock to 10 Mhz or lesser I can see two ways:&lt;BR /&gt;1. Modify the dividers what are involucrate in the flow clock.&lt;BR /&gt;2. Use Config tools. MCUXpresso Ecosystem offers config tools, where is an integrated suite of configuration tools, is designed to guide customers from first evaluation to production software development.&lt;BR /&gt;This &lt;A href="https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/mcuxpresso-config-tools-pins-clocks-and-peripherals:MCUXpresso-Config-Tools#training" target="_self"&gt;link&lt;/A&gt; has many trainings that could help you to learn more about how use config tools, also in the same link you can see the file called "MCUXpresso Config Tools User's Guide (IDE)" that could be helpful.&lt;BR /&gt;Also, if you experience any issue do not hesitate to let me know.&lt;BR /&gt;BR&lt;BR /&gt;Habib.&lt;/P&gt;</description>
    <pubDate>Wed, 08 Jan 2025 22:24:10 GMT</pubDate>
    <dc:creator>Habib_MS</dc:creator>
    <dc:date>2025-01-08T22:24:10Z</dc:date>
    <item>
      <title>Assistance Needed with SPI Communication Between IMXRT1064 (Slave) and SAMA5D4 (Master)</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/Assistance-Needed-with-SPI-Communication-Between-IMXRT1064-Slave/m-p/2017082#M2213</link>
      <description>&lt;P&gt;Dear Community,&lt;/P&gt;&lt;P&gt;I am currently working on SPI communication between an IMXRT1064 EVK (configured as the slave) and a SAMA5D4 (configured as the master). On the IMXRT1064, I am using LPSPI1 with the following pin configurations:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;STRONG&gt;CLK&lt;/STRONG&gt;: GPIO_SD_B0_00&lt;/LI&gt;&lt;LI&gt;&lt;STRONG&gt;CS&lt;/STRONG&gt;: GPIO_SD_B0_01&lt;/LI&gt;&lt;LI&gt;&lt;STRONG&gt;MOSI&lt;/STRONG&gt;: GPIO_SD_B0_02&lt;/LI&gt;&lt;LI&gt;&lt;STRONG&gt;MISO&lt;/STRONG&gt;: GPIO_SD_B0_03&lt;/LI&gt;&lt;/UL&gt;&lt;H3&gt;Issue:&lt;/H3&gt;&lt;P&gt;When connecting the wires as follows:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Master MOSI to Slave MOSI&lt;/LI&gt;&lt;LI&gt;Master MISO to Slave MISO&lt;/LI&gt;&lt;LI&gt;Master SCK to Slave SCK&lt;/LI&gt;&lt;LI&gt;Master CS to Slave CS&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;The slave only receives and prints 5 zeros (0x00) as output, even though the master is sending 5 bytes (1, 2, 3, 4, 5). Similarly, when the slave sends the same sequence (1, 2, 3, 4, 5) to the master, the master receives only zeros (0x00).&lt;/P&gt;&lt;P&gt;However, if I modify the connections as follows:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;STRONG&gt;Master MOSI connected to Slave MISO&lt;/STRONG&gt;&lt;/LI&gt;&lt;LI&gt;&lt;STRONG&gt;Master MISO unconnected&lt;/STRONG&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;The slave correctly receives the data (1, 2, 3, 4, 5) from the master. But, if I additionally connect the master’s MISO pin to the slave’s MOSI pin, the data becomes corrupted on both ends, and neither the master nor the slave receives the correct values.&lt;/P&gt;&lt;H3&gt;Additional Concerns:&lt;/H3&gt;&lt;P&gt;I suspect there might be an issue with the LPSPI clock configuration on the IMXRT1064. The clock frequency seems to remain fixed at 600 MHz, even when I change the clock divider value. I am unsure whether the LPSPI clock is enabled properly.&lt;/P&gt;&lt;H3&gt;Request:&lt;/H3&gt;&lt;OL&gt;&lt;LI&gt;Could you please help me resolve the SPI communication issue?&lt;/LI&gt;&lt;LI&gt;Could you guide me on verifying and enabling the LPSPI clock configuration on the IMXRT1064?&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;For reference, I have attached the relevant code below. I would appreciate any insights or suggestions to resolve this issue as soon as possible.&lt;BR /&gt;&lt;BR /&gt;Code:&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;P&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"fsl_device_registers.h"&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"fsl_debug_console.h"&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"fsl_lpspi.h"&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"pin_mux.h"&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"board.h"&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"fsl_common.h"&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#if&lt;/SPAN&gt;&lt;SPAN&gt; ((defined FSL_FEATURE_SOC_INTMUX_COUNT) &amp;amp;&amp;amp; (FSL_FEATURE_SOC_INTMUX_COUNT))&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"fsl_intmux.h"&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#endif&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/*******************************************************************************&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;* Definitions&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;******************************************************************************/&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Slave related */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; EXAMPLE_LPSPI_SLAVE_BASEADDR (LPSPI1)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; EXAMPLE_LPSPI_SLAVE_IRQN (LPSPI1_IRQn)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; EXAMPLE_LPSPI_SLAVE_PCS_FOR_INIT (kLPSPI_Pcs0)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; EXAMPLE_LPSPI_SLAVE_PCS_FOR_TRANSFER (kLPSPI_SlavePcs0)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Select USB1 PLL PFD0 (720 MHz) as &lt;/SPAN&gt;&lt;SPAN&gt;lpspi&lt;/SPAN&gt;&lt;SPAN&gt; clock source */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; EXAMPLE_LPSPI_CLOCK_SOURCE_SELECT (2U)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Clock divider for master &lt;/SPAN&gt;&lt;SPAN&gt;lpspi&lt;/SPAN&gt;&lt;SPAN&gt; clock source */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; EXAMPLE_LPSPI_CLOCK_SOURCE_DIVIDER (60U)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; TRANSFER_SIZE 5U &lt;/SPAN&gt;&lt;SPAN&gt;/*! Transfer dataSize */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/*******************************************************************************&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;* Prototypes&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;******************************************************************************/&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* LPSPI user callback */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;void&lt;/SPAN&gt; &lt;SPAN&gt;LPSPI_SlaveUserCallback&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;LPSPI_Type&lt;/SPAN&gt;&lt;SPAN&gt; *base, &lt;/SPAN&gt;&lt;SPAN&gt;lpspi_slave_handle_t&lt;/SPAN&gt;&lt;SPAN&gt; *handle, &lt;/SPAN&gt;&lt;SPAN&gt;status_t&lt;/SPAN&gt;&lt;SPAN&gt; status, &lt;/SPAN&gt;&lt;SPAN&gt;void&lt;/SPAN&gt;&lt;SPAN&gt; *userData);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/*******************************************************************************&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;* Variables&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;******************************************************************************/&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;uint8_t&lt;/SPAN&gt;&lt;SPAN&gt; slaveRxData[TRANSFER_SIZE] = {0U};&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;uint8_t&lt;/SPAN&gt;&lt;SPAN&gt; slaveTxData[TRANSFER_SIZE] = {0U};&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;lpspi_slave_handle_t&lt;/SPAN&gt;&lt;SPAN&gt; g_s_handle;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;volatile&lt;/SPAN&gt;&lt;SPAN&gt; bool isTransferCompleted = false;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/*******************************************************************************&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;* Code&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;******************************************************************************/&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;void&lt;/SPAN&gt; &lt;SPAN&gt;LPSPI_SlaveUserCallback&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;LPSPI_Type&lt;/SPAN&gt;&lt;SPAN&gt; *base, &lt;/SPAN&gt;&lt;SPAN&gt;lpspi_slave_handle_t&lt;/SPAN&gt;&lt;SPAN&gt; *handle, &lt;/SPAN&gt;&lt;SPAN&gt;status_t&lt;/SPAN&gt;&lt;SPAN&gt; status, &lt;/SPAN&gt;&lt;SPAN&gt;void&lt;/SPAN&gt;&lt;SPAN&gt; *userData)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;if&lt;/SPAN&gt;&lt;SPAN&gt; (status == &lt;/SPAN&gt;&lt;SPAN&gt;kStatus_Success&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;PRINTF(&lt;/SPAN&gt;&lt;SPAN&gt;"This is LPSPI slave transfer completed callback. \r\n"&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;PRINTF(&lt;/SPAN&gt;&lt;SPAN&gt;"It's a successful transfer. \r\n\r\n"&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;if&lt;/SPAN&gt;&lt;SPAN&gt; (status == &lt;/SPAN&gt;&lt;SPAN&gt;kStatus_LPSPI_Error&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;PRINTF(&lt;/SPAN&gt;&lt;SPAN&gt;"This is LPSPI slave transfer completed callback. \r\n"&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;PRINTF(&lt;/SPAN&gt;&lt;SPAN&gt;"Error occurred in this transfer. \r\n\r\n"&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;isTransferCompleted = true;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/*!&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;* @brief Main function&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;*/&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;int&lt;/SPAN&gt; &lt;SPAN&gt;main&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;void&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;BOARD_ConfigMPU();&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;BOARD_InitBootPins();&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;BOARD_InitBootClocks();&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;BOARD_InitDebugConsole();&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/*Set clock source for LPSPI*/&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;CLOCK_SetMux(&lt;/SPAN&gt;&lt;SPAN&gt;kCLOCK_LpspiMux&lt;/SPAN&gt;&lt;SPAN&gt;, EXAMPLE_LPSPI_CLOCK_SOURCE_SELECT);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;CLOCK_SetDiv(&lt;/SPAN&gt;&lt;SPAN&gt;kCLOCK_LpspiDiv&lt;/SPAN&gt;&lt;SPAN&gt;, EXAMPLE_LPSPI_CLOCK_SOURCE_DIVIDER);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;// &lt;/SPAN&gt;&lt;SPAN&gt;int&lt;/SPAN&gt; &lt;SPAN&gt;clockfreq&lt;/SPAN&gt;&lt;SPAN&gt; = CLOCK_GetDiv(kCLOCK_LpspiDiv);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;// &lt;/SPAN&gt;&lt;SPAN&gt;int&lt;/SPAN&gt; &lt;SPAN&gt;clockfreq&lt;/SPAN&gt;&lt;SPAN&gt; = CLOCK_GetFreq(kCLOCK_CpuClk);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;uint32_t&lt;/SPAN&gt;&lt;SPAN&gt; clockfreq = CLOCK_GetFreq(&lt;/SPAN&gt;&lt;SPAN&gt;kCLOCK_Lpspi1&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;//PRINTF("LPSPI board to board polling example.\r\n");&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;uint32_t&lt;/SPAN&gt;&lt;SPAN&gt; i;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;lpspi_slave_config_t&lt;/SPAN&gt;&lt;SPAN&gt; slaveConfig;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;lpspi_transfer_t&lt;/SPAN&gt;&lt;SPAN&gt; slaveXfer;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/*Slave &lt;/SPAN&gt;&lt;SPAN&gt;config&lt;/SPAN&gt;&lt;SPAN&gt;*/&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;LPSPI_SlaveGetDefaultConfig(&amp;amp;slaveConfig);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;slaveConfig.&lt;/SPAN&gt;&lt;SPAN&gt;whichPcs&lt;/SPAN&gt;&lt;SPAN&gt; = EXAMPLE_LPSPI_SLAVE_PCS_FOR_INIT;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;for&lt;/SPAN&gt;&lt;SPAN&gt; (i = 0U; i &amp;lt; TRANSFER_SIZE; i++)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;slaveTxData[i] = i+1;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;LPSPI_SlaveInit(EXAMPLE_LPSPI_SLAVE_BASEADDR, &amp;amp;slaveConfig);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;LPSPI_SlaveTransferCreateHandle(EXAMPLE_LPSPI_SLAVE_BASEADDR, &amp;amp;g_s_handle, LPSPI_SlaveUserCallback, NULL);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;while&lt;/SPAN&gt;&lt;SPAN&gt; (1)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;PRINTF(&lt;/SPAN&gt;&lt;SPAN&gt;"\r\n Slave is running...\r\n"&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;PRINTF(&lt;/SPAN&gt;&lt;SPAN&gt;"\r\n Clock &lt;/SPAN&gt;&lt;SPAN&gt;freq&lt;/SPAN&gt;&lt;SPAN&gt;:- %d\r\n"&lt;/SPAN&gt;&lt;SPAN&gt;,clockfreq);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Reset the receive buffer */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;for&lt;/SPAN&gt;&lt;SPAN&gt; (i = 0U; i &amp;lt; TRANSFER_SIZE; i++)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;slaveRxData[i] = 0U;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Set slave transfer ready to receive data */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;isTransferCompleted = false;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;slaveXfer.&lt;/SPAN&gt;&lt;SPAN&gt;txData&lt;/SPAN&gt;&lt;SPAN&gt; = slaveTxData;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;slaveXfer.&lt;/SPAN&gt;&lt;SPAN&gt;rxData&lt;/SPAN&gt;&lt;SPAN&gt; = slaveRxData;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;slaveXfer.&lt;/SPAN&gt;&lt;SPAN&gt;dataSize&lt;/SPAN&gt;&lt;SPAN&gt; = TRANSFER_SIZE;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;slaveXfer.&lt;/SPAN&gt;&lt;SPAN&gt;configFlags&lt;/SPAN&gt;&lt;SPAN&gt; = EXAMPLE_LPSPI_SLAVE_PCS_FOR_TRANSFER | &lt;/SPAN&gt;&lt;SPAN&gt;kLPSPI_SlaveByteSwap&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Slave start receive */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;LPSPI_SlaveTransferNonBlocking(EXAMPLE_LPSPI_SLAVE_BASEADDR, &amp;amp;g_s_handle, &amp;amp;slaveXfer);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;while&lt;/SPAN&gt;&lt;SPAN&gt; (!isTransferCompleted)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Set slave transfer ready to send back data */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;// isTransferCompleted = false;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;//&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;// slaveXfer.txData = slaveRxData;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;// slaveXfer.rxData = NULL;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;// slaveXfer.dataSize = TRANSFER_SIZE;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;// slaveXfer.configFlags = EXAMPLE_LPSPI_SLAVE_PCS_FOR_TRANSFER | kLPSPI_SlaveByteSwap;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;//&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;// /* Slave start send */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;// LPSPI_SlaveTransferNonBlocking(EXAMPLE_LPSPI_SLAVE_BASEADDR, &lt;/SPAN&gt;&lt;SPAN&gt;&amp;amp;g_s_handle&lt;/SPAN&gt;&lt;SPAN&gt;, &amp;amp;slaveXfer);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;//&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;// while (!isTransferCompleted)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;// {&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;// }&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Print out receive buffer */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;PRINTF(&lt;/SPAN&gt;&lt;SPAN&gt;"\r\n Slave received:"&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;for&lt;/SPAN&gt;&lt;SPAN&gt; (i = 0U; i &amp;lt; TRANSFER_SIZE; i++)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;/* Print 16 numbers in a line */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;if&lt;/SPAN&gt;&lt;SPAN&gt; ((i &amp;amp; 0x0FU) == 0U)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;PRINTF(&lt;/SPAN&gt;&lt;SPAN&gt;"\r\n "&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;PRINTF(&lt;/SPAN&gt;&lt;SPAN&gt;" %02X"&lt;/SPAN&gt;&lt;SPAN&gt;, slaveRxData[i]);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;PRINTF(&lt;/SPAN&gt;&lt;SPAN&gt;"\r\n"&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Thu, 19 Dec 2024 09:16:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/Assistance-Needed-with-SPI-Communication-Between-IMXRT1064-Slave/m-p/2017082#M2213</guid>
      <dc:creator>Jayaganesh</dc:creator>
      <dc:date>2024-12-19T09:16:35Z</dc:date>
    </item>
    <item>
      <title>Re: Assistance Needed with SPI Communication Between IMXRT1064 (Slave) and SAMA5D4 (Master)</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/Assistance-Needed-with-SPI-Communication-Between-IMXRT1064-Slave/m-p/2017461#M2216</link>
      <description>&lt;P class="lia-align-justify"&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/244801"&gt;@Jayaganesh&lt;/a&gt;,&lt;BR /&gt;In order to support you better, can you provide me the frame of all LPSPI signals?&lt;BR /&gt;Also, as mentioned in the table 14-5 called "System Clock Frequency Values" in the RM, the maximum clock source of LPSPI is 132MHz. Please take in mind this value. At the same time, the function called "CLOCK_GetFreq" that you are currently using in your code, receives an enum called "clock_name_t" instead "clock_ip_name_t" that is the enum of "kCLOCK_Lpspi1".&lt;/P&gt;
&lt;P class="lia-align-justify"&gt;&lt;BR /&gt;In the other hand, The SDK (version 2.16) offers the example called "lpspi_loopback" where you can corroborate if your board is working as expected, also if you have two RT1060's boards, you can use the SDK (version 2.16) example called "lpspi_interrupt_b2b_master" with "lpspi_interrupt_b2b_slave". I highly recommend see the readme of the example that you will use. Where is inside the folder called "doc", as shown in the next image:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Habib_MS_0-1734645213070.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/316750iCED50219E7BD5925/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Habib_MS_0-1734645213070.png" alt="Habib_MS_0-1734645213070.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;BR&lt;BR /&gt;Habib&lt;/P&gt;</description>
      <pubDate>Thu, 19 Dec 2024 21:55:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/Assistance-Needed-with-SPI-Communication-Between-IMXRT1064-Slave/m-p/2017461#M2216</guid>
      <dc:creator>Habib_MS</dc:creator>
      <dc:date>2024-12-19T21:55:21Z</dc:date>
    </item>
    <item>
      <title>Re: Assistance Needed with SPI Communication Between IMXRT1064 (Slave) and SAMA5D4 (Master)</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/Assistance-Needed-with-SPI-Communication-Between-IMXRT1064-Slave/m-p/2021905#M2288</link>
      <description>&lt;P&gt;Thank You Habib for the previous support, i have another doubt! How to set lpspi2 clock to 10mhz or lesser! I used PLL2 pfd2&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;&lt;SPAN&gt;CLOCK_InitSysPfd&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;kCLOCK_Pfd2&lt;/SPAN&gt;&lt;SPAN&gt;, 35&lt;/SPAN&gt;&lt;SPAN&gt;&lt;SPAN&gt;) and clock divider to 7. I got 33mhz as op but i needed even more lesser as i mentioned earlier! I also tried PLL3 pfd1&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;CLOCK_InitUsb1Pfd&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;kCLOCK_Pfd1&lt;/SPAN&gt;&lt;SPAN&gt;, 35&lt;/SPAN&gt;&lt;SPAN&gt;);&amp;nbsp; &amp;nbsp;but there was no change in clk value and i also checked by changing 35 to 12, etc! So guide me to set lpspi2 clock to 10mhz or less asap.&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;</description>
      <pubDate>Fri, 03 Jan 2025 13:18:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/Assistance-Needed-with-SPI-Communication-Between-IMXRT1064-Slave/m-p/2021905#M2288</guid>
      <dc:creator>Jayaganesh</dc:creator>
      <dc:date>2025-01-03T13:18:36Z</dc:date>
    </item>
    <item>
      <title>Re: Assistance Needed with SPI Communication Between IMXRT1064 (Slave) and SAMA5D4 (Master)</title>
      <link>https://community.nxp.com/t5/MCX-Microcontrollers/Assistance-Needed-with-SPI-Communication-Between-IMXRT1064-Slave/m-p/2024324#M2316</link>
      <description>&lt;P&gt;Hello again &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/244801"&gt;@Jayaganesh&lt;/a&gt;,&lt;BR /&gt;In order to set lpspi2 clock to 10 Mhz or lesser I can see two ways:&lt;BR /&gt;1. Modify the dividers what are involucrate in the flow clock.&lt;BR /&gt;2. Use Config tools. MCUXpresso Ecosystem offers config tools, where is an integrated suite of configuration tools, is designed to guide customers from first evaluation to production software development.&lt;BR /&gt;This &lt;A href="https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/mcuxpresso-config-tools-pins-clocks-and-peripherals:MCUXpresso-Config-Tools#training" target="_self"&gt;link&lt;/A&gt; has many trainings that could help you to learn more about how use config tools, also in the same link you can see the file called "MCUXpresso Config Tools User's Guide (IDE)" that could be helpful.&lt;BR /&gt;Also, if you experience any issue do not hesitate to let me know.&lt;BR /&gt;BR&lt;BR /&gt;Habib.&lt;/P&gt;</description>
      <pubDate>Wed, 08 Jan 2025 22:24:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCX-Microcontrollers/Assistance-Needed-with-SPI-Communication-Between-IMXRT1064-Slave/m-p/2024324#M2316</guid>
      <dc:creator>Habib_MS</dc:creator>
      <dc:date>2025-01-08T22:24:10Z</dc:date>
    </item>
  </channel>
</rss>

