https://community.nxp.com/t5/MCX-Microcontrollers/How-to-understand-IO-structure-diagram/m-p/1947756#M1608 <P>Hello&nbsp;<a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/239912">@SiLongWu</a>&nbsp;</P> <P>&nbsp;</P> <P>Could you please tell me which chip you are using?</P> <P>&nbsp;</P> <P>BR</P> <P>Alice</P> <P>&nbsp;</P> <P>&nbsp;</P> Thu, 05 Sep 2024 03:23:32 GMT Alice_Yang 2024-09-05T03:23:32Z https://community.nxp.com/t5/MCX-Microcontrollers/How-to-understand-IO-structure-diagram/m-p/1944790#M1589 <P>How to understand General purpose IO structure diagram and pad control register?</P><P>Here are relative pictures below.&nbsp;</P><P>Why does ODE take the opposite, then perform "&amp;" operations with Pull_Keeper_Enable, and then take the opposite of the computed result? In the description of register, Pull_Keeper_enable when Pull_Keeper_Enable == 1. So the diagram are different from the&nbsp;description of register.</P><P>What is the meaning of pull_en_b?</P><P>Why is there no Pull_Enable to work in the diagram?</P><P>In input mode, why are two inverters connected in series, and how can they take effect?&nbsp;Is their function to latch input data or to act as a delay circuit?</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="gpio_pad_structure.png" style="width: 691px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/296381i4FCBA0187016587B/image-size/large?v=v2&amp;px=999" role="button" title="gpio_pad_structure.png" alt="gpio_pad_structure.png" /></span><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="_pad_ctl_pad_.jpg" style="width: 677px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/296382i83E0BD17A02D0B6A/image-size/large?v=v2&amp;px=999" role="button" title="_pad_ctl_pad_.jpg" alt="_pad_ctl_pad_.jpg" /></span></P> Sat, 31 Aug 2024 06:44:13 GMT https://community.nxp.com/t5/MCX-Microcontrollers/How-to-understand-IO-structure-diagram/m-p/1944790#M1589 SiLongWu 2024-08-31T06:44:13Z https://community.nxp.com/t5/MCX-Microcontrollers/How-to-understand-IO-structure-diagram/m-p/1947756#M1608 <P>Hello&nbsp;<a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/239912">@SiLongWu</a>&nbsp;</P> <P>&nbsp;</P> <P>Could you please tell me which chip you are using?</P> <P>&nbsp;</P> <P>BR</P> <P>Alice</P> <P>&nbsp;</P> <P>&nbsp;</P> Thu, 05 Sep 2024 03:23:32 GMT https://community.nxp.com/t5/MCX-Microcontrollers/How-to-understand-IO-structure-diagram/m-p/1947756#M1608 Alice_Yang 2024-09-05T03:23:32Z