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    <title>topic can't open PCI Endpoint Test device in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1383341#M9604</link>
    <description>&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;I have two lX2080A custom boards, one of which is rc and the other is EP.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Currently, ep devices can be discovered at the RC side.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;But the PCITest failed: can't open PCI Endpoint Test device: No such file or directory.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;Ep Device log and&amp;nbsp; RC Device log is in the attachment.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;FONT color="#FF6600"&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;my reference: &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;FONT color="#FF6600"&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;&lt;A href="https://community.nxp.com/t5/QorIQ-Knowledge-Base/LS1046A-RDB-in-PCIe-Endpoint-Mode/ta-p/1107415" target="_blank" rel="noopener"&gt;https://community.nxp.com/t5/QorIQ-Knowledge-Base/LS1046A-RDB-in-PCIe-Endpoint-Mode/ta-p/1107415&lt;/A&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;FONT color="#FF6600"&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;linux\linux\Documentation\PCI\endpoint\pci-test-howto.txt&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;The lspci -v information is as follows:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;root@localhost:~# lspci -v&lt;BR /&gt;0000:00:00.0 PCI bridge: Freescale Semiconductor Inc Device 8d82 (rev 20) (prog-if 00 [Normal decode])&lt;BR /&gt;Flags: bus master, fast devsel, latency 0, IRQ 369&lt;BR /&gt;Bus: primary=00, secondary=01, subordinate=ff, sec-latency=0&lt;BR /&gt;Capabilities: [40] Power Management version 3&lt;BR /&gt;Capabilities: [50] MSI: Enable- Count=1/32 Maskable+ 64bit+&lt;BR /&gt;Capabilities: [70] Express Root Port (Slot-), MSI 00&lt;BR /&gt;Capabilities: [100] Advanced Error Reporting&lt;BR /&gt;Capabilities: [148] #19&lt;BR /&gt;Kernel driver in use: pcieport&lt;/P&gt;&lt;P&gt;0001:00:00.0 PCI bridge: Freescale Semiconductor Inc Device 8d82 (rev 20) (prog-if 00 [Normal decode])&lt;BR /&gt;Flags: bus master, fast devsel, latency 0, IRQ 370&lt;BR /&gt;Bus: primary=00, secondary=01, subordinate=ff, sec-latency=0&lt;BR /&gt;Capabilities: [40] Power Management version 3&lt;BR /&gt;Capabilities: [50] MSI: Enable- Count=1/32 Maskable+ 64bit+&lt;BR /&gt;Capabilities: [70] Express Root Port (Slot-), MSI 00&lt;BR /&gt;Capabilities: [100] Advanced Error Reporting&lt;BR /&gt;Capabilities: [148] #19&lt;BR /&gt;Kernel driver in use: pcieport&lt;/P&gt;&lt;P&gt;......&lt;/P&gt;&lt;P&gt;.......&lt;/P&gt;&lt;P&gt;0004:00:00.0 PCI bridge: Freescale Semiconductor Inc Device 8d82 (rev 20) (prog-if 00 [Normal decode])&lt;BR /&gt;Flags: bus master, fast devsel, latency 0, IRQ 373&lt;BR /&gt;Bus: primary=00, secondary=01, subordinate=ff, sec-latency=0&lt;BR /&gt;Memory behind bridge: 40000000-417fffff&lt;BR /&gt;Capabilities: [40] Power Management version 3&lt;BR /&gt;Capabilities: [50] MSI: Enable- Count=1/32 Maskable+ 64bit+&lt;BR /&gt;Capabilities: [70] Express Root Port (Slot-), MSI 00&lt;BR /&gt;Capabilities: [b0] MSI-X: Enable- Count=8 Masked-&lt;BR /&gt;Capabilities: [100] Advanced Error Reporting&lt;BR /&gt;Capabilities: [158] #19&lt;BR /&gt;Kernel driver in use: pcieport&lt;/P&gt;&lt;P&gt;&lt;FONT color="#FF6600"&gt;0004:01:00.0 Unassigned class [ff00]: Freescale Semiconductor Inc Device 8d82&lt;/FONT&gt;&lt;BR /&gt;Flags: bus master, fast devsel, latency 0, IRQ 255&lt;BR /&gt;Memory at a041020600 (32-bit, non-prefetchable) [size=256]&lt;BR /&gt;Memory at a041020400 (32-bit, non-prefetchable) [size=512]&lt;BR /&gt;Memory at a041020000 (64-bit, non-prefetchable) [size=1K]&lt;BR /&gt;Memory at a041000000 (64-bit, non-prefetchable) [size=128K]&lt;BR /&gt;Expansion ROM at a040000000 [disabled] [size=16M]&lt;BR /&gt;Capabilities: [40] Power Management version 3&lt;BR /&gt;Capabilities: [50] MSI: Enable- Count=1/2 Maskable+ 64bit+&lt;BR /&gt;Capabilities: [70] Express Endpoint, MSI 00&lt;BR /&gt;Capabilities: [100] Advanced Error Reporting&lt;BR /&gt;Capabilities: [148] #19&lt;BR /&gt;Capabilities: [168] Address Translation Service (ATS)&lt;/P&gt;&lt;P&gt;0005:00:00.0 PCI bridge: Freescale Semiconductor Inc Device 8d82 (rev 20) (prog-if 00 [Normal decode])&lt;BR /&gt;Flags: bus master, fast devsel, latency 0, IRQ 374&lt;BR /&gt;Bus: primary=00, secondary=01, subordinate=ff, sec-latency=0&lt;BR /&gt;Capabilities: [40] Power Management version 3&lt;BR /&gt;Capabilities: [50] MSI: Enable- Count=1/32 Maskable+ 64bit+&lt;BR /&gt;Capabilities: [70] Express Root Port (Slot-), MSI 00&lt;BR /&gt;Capabilities: [100] Advanced Error Reporting&lt;BR /&gt;Capabilities: [148] #19&lt;BR /&gt;Kernel driver in use: pcieport&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;root@localhost:~# &lt;FONT color="#FF6600"&gt;./pcitest&lt;/FONT&gt;&lt;BR /&gt;can't open PCI Endpoint Test device: No such file or directory&lt;BR /&gt;&lt;A href="mailto:root@localhost:~" target="_blank" rel="noopener"&gt;root@localhost:~#&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Does this device "/dev/pci-endpoint-test.0" exist?&amp;nbsp; If it exists, is it on the RC side or ep side? I did not&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;find this device on either side.&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Wed, 08 Dec 2021 13:53:27 GMT</pubDate>
    <dc:creator>muaxi8</dc:creator>
    <dc:date>2021-12-08T13:53:27Z</dc:date>
    <item>
      <title>can't open PCI Endpoint Test device</title>
      <link>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1383341#M9604</link>
      <description>&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;I have two lX2080A custom boards, one of which is rc and the other is EP.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Currently, ep devices can be discovered at the RC side.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;But the PCITest failed: can't open PCI Endpoint Test device: No such file or directory.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;Ep Device log and&amp;nbsp; RC Device log is in the attachment.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;FONT color="#FF6600"&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;my reference: &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;FONT color="#FF6600"&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;&lt;A href="https://community.nxp.com/t5/QorIQ-Knowledge-Base/LS1046A-RDB-in-PCIe-Endpoint-Mode/ta-p/1107415" target="_blank" rel="noopener"&gt;https://community.nxp.com/t5/QorIQ-Knowledge-Base/LS1046A-RDB-in-PCIe-Endpoint-Mode/ta-p/1107415&lt;/A&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;FONT color="#FF6600"&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;linux\linux\Documentation\PCI\endpoint\pci-test-howto.txt&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;The lspci -v information is as follows:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;root@localhost:~# lspci -v&lt;BR /&gt;0000:00:00.0 PCI bridge: Freescale Semiconductor Inc Device 8d82 (rev 20) (prog-if 00 [Normal decode])&lt;BR /&gt;Flags: bus master, fast devsel, latency 0, IRQ 369&lt;BR /&gt;Bus: primary=00, secondary=01, subordinate=ff, sec-latency=0&lt;BR /&gt;Capabilities: [40] Power Management version 3&lt;BR /&gt;Capabilities: [50] MSI: Enable- Count=1/32 Maskable+ 64bit+&lt;BR /&gt;Capabilities: [70] Express Root Port (Slot-), MSI 00&lt;BR /&gt;Capabilities: [100] Advanced Error Reporting&lt;BR /&gt;Capabilities: [148] #19&lt;BR /&gt;Kernel driver in use: pcieport&lt;/P&gt;&lt;P&gt;0001:00:00.0 PCI bridge: Freescale Semiconductor Inc Device 8d82 (rev 20) (prog-if 00 [Normal decode])&lt;BR /&gt;Flags: bus master, fast devsel, latency 0, IRQ 370&lt;BR /&gt;Bus: primary=00, secondary=01, subordinate=ff, sec-latency=0&lt;BR /&gt;Capabilities: [40] Power Management version 3&lt;BR /&gt;Capabilities: [50] MSI: Enable- Count=1/32 Maskable+ 64bit+&lt;BR /&gt;Capabilities: [70] Express Root Port (Slot-), MSI 00&lt;BR /&gt;Capabilities: [100] Advanced Error Reporting&lt;BR /&gt;Capabilities: [148] #19&lt;BR /&gt;Kernel driver in use: pcieport&lt;/P&gt;&lt;P&gt;......&lt;/P&gt;&lt;P&gt;.......&lt;/P&gt;&lt;P&gt;0004:00:00.0 PCI bridge: Freescale Semiconductor Inc Device 8d82 (rev 20) (prog-if 00 [Normal decode])&lt;BR /&gt;Flags: bus master, fast devsel, latency 0, IRQ 373&lt;BR /&gt;Bus: primary=00, secondary=01, subordinate=ff, sec-latency=0&lt;BR /&gt;Memory behind bridge: 40000000-417fffff&lt;BR /&gt;Capabilities: [40] Power Management version 3&lt;BR /&gt;Capabilities: [50] MSI: Enable- Count=1/32 Maskable+ 64bit+&lt;BR /&gt;Capabilities: [70] Express Root Port (Slot-), MSI 00&lt;BR /&gt;Capabilities: [b0] MSI-X: Enable- Count=8 Masked-&lt;BR /&gt;Capabilities: [100] Advanced Error Reporting&lt;BR /&gt;Capabilities: [158] #19&lt;BR /&gt;Kernel driver in use: pcieport&lt;/P&gt;&lt;P&gt;&lt;FONT color="#FF6600"&gt;0004:01:00.0 Unassigned class [ff00]: Freescale Semiconductor Inc Device 8d82&lt;/FONT&gt;&lt;BR /&gt;Flags: bus master, fast devsel, latency 0, IRQ 255&lt;BR /&gt;Memory at a041020600 (32-bit, non-prefetchable) [size=256]&lt;BR /&gt;Memory at a041020400 (32-bit, non-prefetchable) [size=512]&lt;BR /&gt;Memory at a041020000 (64-bit, non-prefetchable) [size=1K]&lt;BR /&gt;Memory at a041000000 (64-bit, non-prefetchable) [size=128K]&lt;BR /&gt;Expansion ROM at a040000000 [disabled] [size=16M]&lt;BR /&gt;Capabilities: [40] Power Management version 3&lt;BR /&gt;Capabilities: [50] MSI: Enable- Count=1/2 Maskable+ 64bit+&lt;BR /&gt;Capabilities: [70] Express Endpoint, MSI 00&lt;BR /&gt;Capabilities: [100] Advanced Error Reporting&lt;BR /&gt;Capabilities: [148] #19&lt;BR /&gt;Capabilities: [168] Address Translation Service (ATS)&lt;/P&gt;&lt;P&gt;0005:00:00.0 PCI bridge: Freescale Semiconductor Inc Device 8d82 (rev 20) (prog-if 00 [Normal decode])&lt;BR /&gt;Flags: bus master, fast devsel, latency 0, IRQ 374&lt;BR /&gt;Bus: primary=00, secondary=01, subordinate=ff, sec-latency=0&lt;BR /&gt;Capabilities: [40] Power Management version 3&lt;BR /&gt;Capabilities: [50] MSI: Enable- Count=1/32 Maskable+ 64bit+&lt;BR /&gt;Capabilities: [70] Express Root Port (Slot-), MSI 00&lt;BR /&gt;Capabilities: [100] Advanced Error Reporting&lt;BR /&gt;Capabilities: [148] #19&lt;BR /&gt;Kernel driver in use: pcieport&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;root@localhost:~# &lt;FONT color="#FF6600"&gt;./pcitest&lt;/FONT&gt;&lt;BR /&gt;can't open PCI Endpoint Test device: No such file or directory&lt;BR /&gt;&lt;A href="mailto:root@localhost:~" target="_blank" rel="noopener"&gt;root@localhost:~#&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Does this device "/dev/pci-endpoint-test.0" exist?&amp;nbsp; If it exists, is it on the RC side or ep side? I did not&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;find this device on either side.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 08 Dec 2021 13:53:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1383341#M9604</guid>
      <dc:creator>muaxi8</dc:creator>
      <dc:date>2021-12-08T13:53:27Z</dc:date>
    </item>
    <item>
      <title>Re: can't open PCI Endpoint Test device</title>
      <link>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1383833#M9613</link>
      <description>&lt;P&gt;&lt;SPAN&gt;/dev/pci-endpoint-test.0 is on the RC side, please check whether you configured "CONFIG_PCI_ENDPOINT_TEST" in RC Kernel configuration file.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Please refer to section "7.2.8.4 PCIe Endpoint Mode Linux driver" in LSDK 21.08 user manual to do testing.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Please refer to the following procedure.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;1. Kernel configuration.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;RC:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;CONFIG_PCI=y&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;CONFIG_PCI_ENDPOINT_TEST=y&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;EP:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;CONFIG_PCI=y&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;CONFIG_PCI_ENDPOINT=y&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;CONFIG_PCI_ENDPOINT_CONFIGFS=y&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;CONFIG_PCI_EPF_TEST=y&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;CONFIG_PCI_LAYERSCAPE_EP=y&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;2. Please configure the following in PCIe EP RCW file.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;HOST_AGT_PEX1=1&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;3. Boot up Linux on EP board and execute the following ommands.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;# cd /sys/kernel/config/pci_ep/&lt;BR /&gt;# mkdir functions/pci_epf_test/func1&lt;BR /&gt;# echo 0x1957 &amp;gt; functions/pci_epf_test/func1/vendorid&lt;BR /&gt;# echo 0x80c0 &amp;gt; functions/pci_epf_test/func1/deviceid&lt;BR /&gt;# echo 2 &amp;gt; functions/pci_epf_test/func1/msi_interrupts&lt;BR /&gt;# echo 8 &amp;gt; functions/pci_epf_test/func1/msix_interrupts&lt;BR /&gt;# ln -s functions/pci_epf_test/func1 controllers/3400000.pcie_ep&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;4. Boot up Linux on RC board and run the functionality tests.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Please get&amp;nbsp;pcitest application and script and Run pcitest.sh.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 09 Dec 2021 07:18:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1383833#M9613</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2021-12-09T07:18:10Z</dc:date>
    </item>
    <item>
      <title>Re: can't open PCI Endpoint Test device</title>
      <link>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1383886#M9614</link>
      <description>&lt;P&gt;&lt;SPAN&gt;I have modified RCW. In the Uboot, devices can be discovered on the EP side and RC side.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;But the test case failed,&amp;nbsp;can't open PCI Endpoint Test device: No such file or directory&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;EP:&lt;/P&gt;&lt;P&gt;uboot log:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="muaxi8_1-1639039348509.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/164621i425F78677E83F8ED/image-size/medium?v=v2&amp;amp;px=400" role="button" title="muaxi8_1-1639039348509.png" alt="muaxi8_1-1639039348509.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;kernel configure:&lt;/P&gt;&lt;P&gt;root@TinyLinux:~#zcat /proc/config.gz |grep -i pci_endpoint&lt;BR /&gt;CONFIG_PCI_ENDPOINT=y&lt;BR /&gt;CONFIG_PCI_ENDPOINT_CONFIGFS=y&lt;BR /&gt;CONFIG_PCI_ENDPOINT_TEST=y&lt;/P&gt;&lt;P&gt;RC:&lt;/P&gt;&lt;P&gt;uboot log:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="muaxi8_0-1639039291276.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/164620i88FD80885D3210F6/image-size/medium?v=v2&amp;amp;px=400" role="button" title="muaxi8_0-1639039291276.png" alt="muaxi8_0-1639039291276.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;kernel configure:&lt;/P&gt;&lt;P&gt;root@TinyLinux:~# zcat /proc/config.gz |grep -i pci_endpoint&lt;BR /&gt;# CONFIG_PCI_ENDPOINT is not set&lt;BR /&gt;CONFIG_PCI_ENDPOINT_TEST=y&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;But the /dev/pcixxx device could not be found :&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;root@TinyLinux:~# ls /dev/p&lt;BR /&gt;port pts/ ptyp1 ptyp3 ptyp5 ptyp7 ptyp9 ptypb ptypd ptypf&lt;BR /&gt;ptmx ptyp0 ptyp2 ptyp4 ptyp6 ptyp8 ptypa ptypc ptype&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Ensure that&amp;nbsp; "/dev/pci-endpoint-test.0" is displayed on the RC side ?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 09 Dec 2021 08:49:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1383886#M9614</guid>
      <dc:creator>muaxi8</dc:creator>
      <dc:date>2021-12-09T08:49:17Z</dc:date>
    </item>
    <item>
      <title>Re: can't open PCI Endpoint Test device</title>
      <link>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1383931#M9615</link>
      <description>&lt;P&gt;Have you also configure the following configuration in EP Kernel?&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;CONFIG_PCI_EPF_TEST=y&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;CONFIG_PCI_LAYERSCAPE_EP=y&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Have you booted up EP to Linux first then type the following commands, then booted up RC to Linux?&lt;/P&gt;&lt;P&gt;# cd /sys/kernel/config/pci_ep/&lt;BR /&gt;# mkdir functions/pci_epf_test/func1&lt;BR /&gt;# echo 0x1957 &amp;gt; functions/pci_epf_test/func1/vendorid&lt;BR /&gt;# echo 0x80c0 &amp;gt; functions/pci_epf_test/func1/deviceid&lt;BR /&gt;# echo 2 &amp;gt; functions/pci_epf_test/func1/msi_interrupts&lt;BR /&gt;# echo 8 &amp;gt; functions/pci_epf_test/func1/msix_interrupts&lt;BR /&gt;# &lt;STRONG&gt;ln -s functions/pci_epf_test/func1 controllers/3800000.pcie_ep&lt;/STRONG&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 09 Dec 2021 09:30:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1383931#M9615</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2021-12-09T09:30:29Z</dc:date>
    </item>
    <item>
      <title>Re: can't open PCI Endpoint Test device</title>
      <link>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1383966#M9616</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Pcie Connection&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="muaxi8_2-1639044140045.png" style="width: 533px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/164641i0C9C78FC6CCBD39F/image-dimensions/533x208?v=v2" width="533" height="208" role="button" title="muaxi8_2-1639044140045.png" alt="muaxi8_2-1639044140045.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;EP:&lt;/P&gt;&lt;P&gt;root@localhost:~# zcat /proc/config.gz |grep -i CONFIG_PCI_EPF&lt;BR /&gt;CONFIG_PCI_EPF_TEST=y&lt;BR /&gt;root@localhost:~# zcat /proc/config.gz |grep -i pci_layer&lt;BR /&gt;CONFIG_PCI_LAYERSCAPE=y&lt;BR /&gt;CONFIG_PCI_LAYERSCAPE_EP=y&lt;/P&gt;&lt;P&gt;&lt;FONT color="#FF0000"&gt;&amp;nbsp;&lt;SPAN&gt;then type the following commands&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT color="#000000"&gt;# cd /sys/kernel/config/pci_ep/&lt;BR /&gt;#mkdir functions/pci_epf_test/func6&lt;BR /&gt;#echo 0x1957 &amp;gt; functions/pci_epf_test/func6/vendorid&lt;BR /&gt;#echo 0x8d82 &amp;gt; functions/pci_epf_test/func6/deviceid&lt;BR /&gt;#echo 2 &amp;gt; functions/pci_epf_test/func6/msi_interrupts&lt;BR /&gt;#echo 8 &amp;gt; functions/pci_epf_test/func6/msix_interrupts&lt;BR /&gt;#ln -s functions/pci_epf_test/func6 controllers/3900000.pcie_ep&lt;BR /&gt;#echo 1 &amp;gt; controllers/3900000.pcie_ep/start&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT color="#000000"&gt;&lt;SPAN&gt;then reboot RC to Linux:&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT color="#000000"&gt;&lt;SPAN&gt;root@TinyLinux:~# zcat /proc/config.gz |grep -i pci_endpo&lt;BR /&gt;# CONFIG_PCI_ENDPOINT is not set&lt;BR /&gt;&lt;FONT color="#000000"&gt;CONFIG_PCI_ENDPOINT_TEST=y&lt;/FONT&gt;&lt;BR /&gt;root@TinyLinux:~# zcat /proc/config.gz |grep -i pci_layer&lt;BR /&gt;&lt;FONT color="#FF6600"&gt;CONFIG_PCI_LAYERSCAPE=y&lt;/FONT&gt;&lt;BR /&gt;&lt;A href="mailto:root@TinyLinux:~" target="_blank" rel="noopener"&gt;root@TinyLinux:~#&lt;/A&gt;&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT color="#000000"&gt;&lt;SPAN&gt;root@TinyLinux:~# ls /dev/p&lt;BR /&gt;port ptmx pts/ ptyp1 ptyp3 ptyp5 ptyp7 ptyp9 ptypb ptypd ptypf&lt;BR /&gt;pps0 ptp0 ptyp0 ptyp2 ptyp4 ptyp6 ptyp8 ptypa ptypc ptype&lt;BR /&gt;&lt;/SPAN&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;FONT color="#000000"&gt;Can EP and RC communicate normally without this endpoint test device?&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 10 Dec 2021 00:45:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1383966#M9616</guid>
      <dc:creator>muaxi8</dc:creator>
      <dc:date>2021-12-10T00:45:57Z</dc:date>
    </item>
    <item>
      <title>Re: can't open PCI Endpoint Test device</title>
      <link>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1384496#M9620</link>
      <description>&lt;P&gt;"/dev/pci-endpoint-test.0"&amp;nbsp;&lt;SPAN&gt; is ready to be found &lt;/SPAN&gt;&lt;SPAN class=""&gt;&amp;nbsp;because the memory space allocated on the RC side is too large.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&amp;nbsp;But how to&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN class=""&gt;change the pcie memory size。&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Sun, 12 Dec 2021 06:21:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1384496#M9620</guid>
      <dc:creator>muaxi8</dc:creator>
      <dc:date>2021-12-12T06:21:32Z</dc:date>
    </item>
    <item>
      <title>Re: can't open PCI Endpoint Test device</title>
      <link>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1474099#M10690</link>
      <description>&lt;P&gt;Hi muaxi8,&lt;/P&gt;&lt;P&gt;Can you show more detail about how to change the&amp;nbsp;&lt;SPAN&gt;pcie memory size to create pci-endpoint-test.0 device. I have the same issue as yours,&amp;nbsp;"/dev/pci-endpoint-test.0" not found, and dmesg reports "&amp;nbsp;can't open PCI Endpoint Test device: No such file or directory".&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 15 Jun 2022 05:38:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1474099#M10690</guid>
      <dc:creator>peiqiongye</dc:creator>
      <dc:date>2022-06-15T05:38:45Z</dc:date>
    </item>
    <item>
      <title>Re: can't open PCI Endpoint Test device</title>
      <link>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1474963#M10701</link>
      <description>&lt;P&gt;first bring up ep, then bring up RC&lt;/P&gt;</description>
      <pubDate>Thu, 16 Jun 2022 03:18:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/can-t-open-PCI-Endpoint-Test-device/m-p/1474963#M10701</guid>
      <dc:creator>muaxi8</dc:creator>
      <dc:date>2022-06-16T03:18:22Z</dc:date>
    </item>
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