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    <title>LayerscapeのトピックRe: MC firmware loading</title>
    <link>https://community.nxp.com/t5/Layerscape/MC-firmware-loading/m-p/1355237#M9085</link>
    <description>&lt;P&gt;1) Useful reference:&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.marcusfolkesson.se/blog/fit-vs-legacy-image-format/" target="_blank"&gt;https://www.marcusfolkesson.se/blog/fit-vs-legacy-image-format/&lt;/A&gt;&lt;/P&gt;&lt;P&gt;2) Refer to the U-Boot source:&lt;/P&gt;&lt;P&gt;&lt;A href="https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot/tree/drivers/net/fsl-mc/mc.c?h=LSDK-21.08" target="_blank"&gt;https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot/tree/drivers/net/fsl-mc/mc.c?h=LSDK-21.08&lt;/A&gt;&lt;/P&gt;&lt;P&gt;3) Yes.&lt;/P&gt;</description>
    <pubDate>Wed, 13 Oct 2021 18:24:39 GMT</pubDate>
    <dc:creator>ufedor</dc:creator>
    <dc:date>2021-10-13T18:24:39Z</dc:date>
    <item>
      <title>MC firmware loading</title>
      <link>https://community.nxp.com/t5/Layerscape/MC-firmware-loading/m-p/1354994#M9084</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I'm trying to find details on the MC firmware image loading process on boot.&lt;/P&gt;&lt;P&gt;DPAA2UM chapter 3.1 has an overview but not any details.&lt;/P&gt;&lt;P&gt;My questions are:&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Where can I find a definition of the FIT format? How is this image parsed for MC loading?&lt;/LI&gt;&lt;LI&gt;How is validation of the image performed against its checksum/version?&lt;/LI&gt;&lt;LI&gt;&lt;SPAN&gt;At what address does the image needs to be loaded, is it the start of MC memory base? (MCFBALR/HR)&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;SPAN&gt;Also, can you please point me to the reference for this in U-Boot code?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;BR /&gt;Dmitri&lt;/P&gt;</description>
      <pubDate>Wed, 13 Oct 2021 13:02:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/MC-firmware-loading/m-p/1354994#M9084</guid>
      <dc:creator>dmitri_lechtchinski</dc:creator>
      <dc:date>2021-10-13T13:02:34Z</dc:date>
    </item>
    <item>
      <title>Re: MC firmware loading</title>
      <link>https://community.nxp.com/t5/Layerscape/MC-firmware-loading/m-p/1355237#M9085</link>
      <description>&lt;P&gt;1) Useful reference:&lt;/P&gt;&lt;P&gt;&lt;A href="https://www.marcusfolkesson.se/blog/fit-vs-legacy-image-format/" target="_blank"&gt;https://www.marcusfolkesson.se/blog/fit-vs-legacy-image-format/&lt;/A&gt;&lt;/P&gt;&lt;P&gt;2) Refer to the U-Boot source:&lt;/P&gt;&lt;P&gt;&lt;A href="https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot/tree/drivers/net/fsl-mc/mc.c?h=LSDK-21.08" target="_blank"&gt;https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot/tree/drivers/net/fsl-mc/mc.c?h=LSDK-21.08&lt;/A&gt;&lt;/P&gt;&lt;P&gt;3) Yes.&lt;/P&gt;</description>
      <pubDate>Wed, 13 Oct 2021 18:24:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/MC-firmware-loading/m-p/1355237#M9085</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2021-10-13T18:24:39Z</dc:date>
    </item>
    <item>
      <title>Re: MC firmware loading</title>
      <link>https://community.nxp.com/t5/Layerscape/MC-firmware-loading/m-p/1355684#M9090</link>
      <description>&lt;P&gt;Thanks, I have a question regarding the implementation:&lt;/P&gt;&lt;P&gt;In mc_init(), mc_ram_addr is obtained by mc_get_dram_addr() which has&amp;nbsp;the following comment:&lt;/P&gt;&lt;PRE&gt;&lt;SPAN class=""&gt;/*&lt;/SPAN&gt;
&lt;SPAN class=""&gt; * Return the MC address of private DRAM block.&lt;/SPAN&gt;
&lt;SPAN class=""&gt; * As per MC design document, MC initial base address&lt;/SPAN&gt;
&lt;SPAN class=""&gt; * should be least significant 512MB address of MC private&lt;/SPAN&gt;
&lt;SPAN class=""&gt; * memory, i.e. address should point to end address masked&lt;/SPAN&gt;
&lt;SPAN class=""&gt; * with 512MB offset in private DRAM block.&lt;/SPAN&gt;
&lt;SPAN class=""&gt; */&lt;/SPAN&gt;&lt;/PRE&gt;&lt;P&gt;Does this mean that&amp;nbsp;&lt;SPAN&gt;MCFBALR/HR actually points to the last 512MB of the MC-reserved memory block?&lt;BR /&gt;Is there reference in documentation to this memory mapping?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 14 Oct 2021 08:23:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/MC-firmware-loading/m-p/1355684#M9090</guid>
      <dc:creator>dmitri_lechtchinski</dc:creator>
      <dc:date>2021-10-14T08:23:44Z</dc:date>
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