Core disable on LS1043ardb

notshure — Thu, 07 Oct 2021 13:18:49 GMT

Hello to all, my goal is to get my LS1043a board to boot by SD and starting the system by shutting down cores 1, 2 and 3. Once the system is up and running, i would like to see from uboot that such cores are disabled.

I performed a custom boot in which I entered the PBI command to disable the cores.

The procedure I followed is well described and can be found in the following link: Procedure

I'm starting u-boot, and then so far so good.
But to make sure that the cores are off I went to read the DCFG_CCSR_COREDISR register, at the address 1EE_0094h using the following u-boot command:

md 0x1ee0094 1

The result I get is the following:

0x1ee0094: 0x0e000000

I shouldn't be reading instead:

0x1ee0094: 0x0000000e

since in the datasheet the bits of that register are defined in this way:

Re: Core disable on LS1043ardb

ufedor — Thu, 07 Oct 2021 17:56:43 GMT

U-Boot is natively big-endian, so for little-endian registers it is needed to perform byte swap.

Re: Core disable on LS1043ardb

notshure — Fri, 08 Oct 2021 07:54:09 GMT

Thanks a lot for the answer.

LayerscapeのトピックRe: Core disable on LS1043ardb

Core disable on LS1043ardb

Re: Core disable on LS1043ardb

Re: Core disable on LS1043ardb