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    <title>LayerscapeのトピックLS2088 TFA: ATF with static ddr init for 2 controllers</title>
    <link>https://community.nxp.com/t5/Layerscape/LS2088-TFA-ATF-with-static-ddr-init-for-2-controllers/m-p/1322334#M8702</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;/P&gt;&lt;P&gt;We have custom designed board based on Ls2088ardb. We currently have PPA++uboot working but trying to convert it to TFA boot.&amp;nbsp;&lt;/P&gt;&lt;P&gt;As per user Gide I have created _ddr_init() and board_static_ddr() function as below.&amp;nbsp;&lt;/P&gt;&lt;P&gt;```&lt;/P&gt;&lt;P&gt;long long board_static_ddr(struct ddr_info *priv)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; &amp;nbsp; if(priv-&amp;gt;ddr[0] == (void *)NXP_DDR_ADDR)&lt;BR /&gt;&amp;nbsp; &amp;nbsp; {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; memcpy(&amp;amp;priv-&amp;gt;ddr_reg, &amp;amp;static_2132, sizeof(static_2132));&lt;BR /&gt;&amp;nbsp; &amp;nbsp; }&lt;BR /&gt;&amp;nbsp; &amp;nbsp; else&lt;BR /&gt;&amp;nbsp; &amp;nbsp; {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; memcpy(&amp;amp;priv-&amp;gt;ddr_reg, &amp;amp;static_2132_2, sizeof(static_2132_2));&lt;BR /&gt;&amp;nbsp; &amp;nbsp; }&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; return ULL(0x200000000);&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;long long _init_ddr(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; &amp;nbsp; Int spd_addr[] = { 0x51, 0x52, 0x53, 0x54 };&lt;BR /&gt;&amp;nbsp; &amp;nbsp; struct ddr_info info;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; struct sysinfo sys;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; long long dram_size;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;zeromem(&amp;amp;sys, sizeof(sys));&lt;BR /&gt;&amp;nbsp; &amp;nbsp;get_clocks(&amp;amp;sys);&lt;BR /&gt;&amp;nbsp; &amp;nbsp;debug("platform clock %lu\n", sys.freq_platform);&lt;BR /&gt;&amp;nbsp; &amp;nbsp;debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0);&lt;BR /&gt;&amp;nbsp; &amp;nbsp;debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1);&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;zeromem(&amp;amp;info, sizeof(info));&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;/* Set two DDRC. Unused DDRC will be removed automatically. */&lt;BR /&gt;&amp;nbsp; &amp;nbsp; info.num_ctlrs = 1;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; info.spd_addr = spd_addr;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; Info.ddr[0] = (void *)NXP_DDR_ADDR;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; //info.ddr[1] = (void *)NXP_DDR2_ADDR;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; info.clk = get_ddr_freq(&amp;amp;sys, 0);&amp;nbsp;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; If (!info.clk)&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; info.clk = get_ddr_freq(&amp;amp;sys, 1);&lt;BR /&gt;&amp;nbsp; &amp;nbsp; info.dimm_on_ctlr = 1;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; dram_size = dram_init(&amp;amp;info);&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; info.ddr[0] = (void *)NXP_DDR2_ADDR;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; dram_size = dram_init(&amp;amp;info);&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; if (dram_size &amp;lt; 0)&lt;BR /&gt;&amp;nbsp; &amp;nbsp; ERROR("DDR init failed.\n");&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; return dram_size;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;```&lt;/P&gt;&lt;P&gt;After compiling PBL for QSPI &amp;nbsp;and BL33 fip binary when I fash it, I do not see any data on UART after the controller reset.&lt;/P&gt;&lt;P&gt;Is there anything I am missing?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 12 Aug 2021 04:06:04 GMT</pubDate>
    <dc:creator>Rohanraj</dc:creator>
    <dc:date>2021-08-12T04:06:04Z</dc:date>
    <item>
      <title>LS2088 TFA: ATF with static ddr init for 2 controllers</title>
      <link>https://community.nxp.com/t5/Layerscape/LS2088-TFA-ATF-with-static-ddr-init-for-2-controllers/m-p/1322334#M8702</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;/P&gt;&lt;P&gt;We have custom designed board based on Ls2088ardb. We currently have PPA++uboot working but trying to convert it to TFA boot.&amp;nbsp;&lt;/P&gt;&lt;P&gt;As per user Gide I have created _ddr_init() and board_static_ddr() function as below.&amp;nbsp;&lt;/P&gt;&lt;P&gt;```&lt;/P&gt;&lt;P&gt;long long board_static_ddr(struct ddr_info *priv)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; &amp;nbsp; if(priv-&amp;gt;ddr[0] == (void *)NXP_DDR_ADDR)&lt;BR /&gt;&amp;nbsp; &amp;nbsp; {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; memcpy(&amp;amp;priv-&amp;gt;ddr_reg, &amp;amp;static_2132, sizeof(static_2132));&lt;BR /&gt;&amp;nbsp; &amp;nbsp; }&lt;BR /&gt;&amp;nbsp; &amp;nbsp; else&lt;BR /&gt;&amp;nbsp; &amp;nbsp; {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; memcpy(&amp;amp;priv-&amp;gt;ddr_reg, &amp;amp;static_2132_2, sizeof(static_2132_2));&lt;BR /&gt;&amp;nbsp; &amp;nbsp; }&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; return ULL(0x200000000);&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;long long _init_ddr(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; &amp;nbsp; Int spd_addr[] = { 0x51, 0x52, 0x53, 0x54 };&lt;BR /&gt;&amp;nbsp; &amp;nbsp; struct ddr_info info;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; struct sysinfo sys;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; long long dram_size;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;zeromem(&amp;amp;sys, sizeof(sys));&lt;BR /&gt;&amp;nbsp; &amp;nbsp;get_clocks(&amp;amp;sys);&lt;BR /&gt;&amp;nbsp; &amp;nbsp;debug("platform clock %lu\n", sys.freq_platform);&lt;BR /&gt;&amp;nbsp; &amp;nbsp;debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0);&lt;BR /&gt;&amp;nbsp; &amp;nbsp;debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1);&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;zeromem(&amp;amp;info, sizeof(info));&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;/* Set two DDRC. Unused DDRC will be removed automatically. */&lt;BR /&gt;&amp;nbsp; &amp;nbsp; info.num_ctlrs = 1;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; info.spd_addr = spd_addr;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; Info.ddr[0] = (void *)NXP_DDR_ADDR;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; //info.ddr[1] = (void *)NXP_DDR2_ADDR;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; info.clk = get_ddr_freq(&amp;amp;sys, 0);&amp;nbsp;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; If (!info.clk)&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; info.clk = get_ddr_freq(&amp;amp;sys, 1);&lt;BR /&gt;&amp;nbsp; &amp;nbsp; info.dimm_on_ctlr = 1;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; dram_size = dram_init(&amp;amp;info);&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; info.ddr[0] = (void *)NXP_DDR2_ADDR;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; dram_size = dram_init(&amp;amp;info);&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; if (dram_size &amp;lt; 0)&lt;BR /&gt;&amp;nbsp; &amp;nbsp; ERROR("DDR init failed.\n");&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; return dram_size;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;```&lt;/P&gt;&lt;P&gt;After compiling PBL for QSPI &amp;nbsp;and BL33 fip binary when I fash it, I do not see any data on UART after the controller reset.&lt;/P&gt;&lt;P&gt;Is there anything I am missing?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 12 Aug 2021 04:06:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS2088-TFA-ATF-with-static-ddr-init-for-2-controllers/m-p/1322334#M8702</guid>
      <dc:creator>Rohanraj</dc:creator>
      <dc:date>2021-08-12T04:06:04Z</dc:date>
    </item>
    <item>
      <title>Re: LS2088 TFA: ATF with static ddr init for 2 controllers</title>
      <link>https://community.nxp.com/t5/Layerscape/LS2088-TFA-ATF-with-static-ddr-init-for-2-controllers/m-p/1322457#M8705</link>
      <description>&lt;P&gt;Please refer to&amp;nbsp;flexbuild_lsdk2012/packages/firmware/atf/plat/nxp/soc-ls1046/ls1046ardb/ddr_init.c for functions&amp;nbsp;&lt;SPAN&gt;board_static_ddr and&amp;nbsp;_init_ddr definition. Please&amp;nbsp;Define macro “CONFIG_STATIC_DDR” in plat/nxp/&amp;lt;SOC&amp;gt;/&amp;lt;BOARD&amp;gt;/plafform_def.h.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;In addition, please customize RCW file in&amp;nbsp;packages/firmware/rcw/ls2088ardb/FFFFFFFF_PP_HH_0x2a_0x41/rcw_2000_qspi.rcw according to your custom board.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Please program pbl image at 0x0, program fip.bin at 0x100000.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 12 Aug 2021 07:34:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS2088-TFA-ATF-with-static-ddr-init-for-2-controllers/m-p/1322457#M8705</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2021-08-12T07:34:58Z</dc:date>
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