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    <title>LayerscapeのトピックRe: LS1043 Hardware design requirements for Secure Boot</title>
    <link>https://community.nxp.com/t5/Layerscape/LS1043-Hardware-design-requirements-for-Secure-Boot/m-p/1316789#M8624</link>
    <description>&lt;P&gt;1. Yes, on our boards it is done in a manual way. You can design your own circuit which will switch the power on/off.&lt;BR /&gt;2. Limit of 6 times relates to fuse programming. After that you will not be able to change/re-program fuses.&lt;BR /&gt;3. No, besides mentioned in 1) above.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 02 Aug 2021 15:09:48 GMT</pubDate>
    <dc:creator>Bulat</dc:creator>
    <dc:date>2021-08-02T15:09:48Z</dc:date>
    <item>
      <title>LS1043 Hardware design requirements for Secure Boot</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1043-Hardware-design-requirements-for-Secure-Boot/m-p/1315206#M8594</link>
      <description>&lt;P&gt;What are the hardware design considerations required for Secure Boot in LS1043 Platform?&lt;/P&gt;&lt;P&gt;LS1043 Datasheet mentions the following 2 Items&lt;/P&gt;&lt;P&gt;Item-1&lt;/P&gt;&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;"TA_PROG_SFP must be supplied 1.8 V and the chip must operate in the specified fuse programming temperature range only during secure boot fuse programming. For all other operating conditions, TA_PROG_SFP must be tied to GND"&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;Item-2&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;For secure boot fuse programming, use the following steps:&lt;BR /&gt;1. After the negation of PORESET_B signal, drive TA_PROG_SFP = 1.8 V after a&lt;BR /&gt;required minimum delay as listed in &lt;/SPAN&gt;&lt;SPAN class="fontstyle0"&gt;Table 7&lt;/SPAN&gt;&lt;SPAN class="fontstyle0"&gt;.&lt;BR /&gt;2. After the fuse programming is complete, it is required to return TA_PROG_SFP =&lt;BR /&gt;GND before the system is power cycled (PORESET_B assertion) or powered down.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;-------------------------------------------------------------------------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;LS1043ARDB (Reference board) has a J13 Jumper option connected to 1.8V.&amp;nbsp; Operated&amp;nbsp;Manually.&lt;/P&gt;&lt;P&gt;Is this the only requirement in hardware for Secure boot implementation ? Any other requirements in Hardware design to implement Secure BOOT for LS1043?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 29 Jul 2021 10:32:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1043-Hardware-design-requirements-for-Secure-Boot/m-p/1315206#M8594</guid>
      <dc:creator>vinodstanly</dc:creator>
      <dc:date>2021-07-29T10:32:32Z</dc:date>
    </item>
    <item>
      <title>Re: LS1043 Hardware design requirements for Secure Boot</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1043-Hardware-design-requirements-for-Secure-Boot/m-p/1315404#M8595</link>
      <description>&lt;P&gt;Yes, switching of &lt;SPAN class="fontstyle0"&gt;TA_PROG_SFP&lt;/SPAN&gt; signal is the only hw design requirement for &lt;SPAN class="fontstyle0"&gt;secure boot fuse programming&lt;/SPAN&gt;.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Bulat&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 29 Jul 2021 16:28:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1043-Hardware-design-requirements-for-Secure-Boot/m-p/1315404#M8595</guid>
      <dc:creator>Bulat</dc:creator>
      <dc:date>2021-07-29T16:28:20Z</dc:date>
    </item>
    <item>
      <title>Re: LS1043 Hardware design requirements for Secure Boot</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1043-Hardware-design-requirements-for-Secure-Boot/m-p/1315607#M8599</link>
      <description>&lt;P&gt;Hi Bulat,&lt;/P&gt;&lt;P&gt;Thanks for your quick response.&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Switching of &lt;SPAN class="fontstyle0"&gt;TA_PROG_SFP&lt;/SPAN&gt; signal is now done Manually, Is there any reference that this feature is automated by a program or additional components.&lt;/LI&gt;&lt;LI&gt;The above programming for Secure boot feature is limited to 6 times in the life time of a processor, right. What happens after that, will the device become read only?&lt;/LI&gt;&lt;LI&gt;Apart from programming, for LS1043 to work with the Secure Boot feature; any other Hardware Connections, additional Components to be considered in the design.&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 30 Jul 2021 03:59:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1043-Hardware-design-requirements-for-Secure-Boot/m-p/1315607#M8599</guid>
      <dc:creator>vinodstanly</dc:creator>
      <dc:date>2021-07-30T03:59:32Z</dc:date>
    </item>
    <item>
      <title>Re: LS1043 Hardware design requirements for Secure Boot</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1043-Hardware-design-requirements-for-Secure-Boot/m-p/1316789#M8624</link>
      <description>&lt;P&gt;1. Yes, on our boards it is done in a manual way. You can design your own circuit which will switch the power on/off.&lt;BR /&gt;2. Limit of 6 times relates to fuse programming. After that you will not be able to change/re-program fuses.&lt;BR /&gt;3. No, besides mentioned in 1) above.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 02 Aug 2021 15:09:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1043-Hardware-design-requirements-for-Secure-Boot/m-p/1316789#M8624</guid>
      <dc:creator>Bulat</dc:creator>
      <dc:date>2021-08-02T15:09:48Z</dc:date>
    </item>
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