topic Re: LS1046A RSTCR register can not control RESET_REQ_B output? in Layerscape

LS1046A RSTCR register can not control RESET_REQ_B output?

flashingsky — Thu, 29 Jul 2021 09:28:17 GMT

Hi,

I set RESET_REQ bit of RSTCR register in LS1046A to 1,why the pin RESET_REQ_B can not output reset request? Whether I set RESET_REQ bit to 1 or 0, RESET_REQ_B always output level 0.

Best Regards

Re: LS1046A RSTCR register can not control RESET_REQ_B output?

Bulat — Fri, 30 Jul 2021 16:51:51 GMT

Low state of RESET_REQ_B signal means that reset request is already issued.

Did you check this signals after reset? Is it high when device comes out of reset sequence?

Regards,

Bulat

Re: LS1046A RSTCR register can not control RESET_REQ_B output?

flashingsky — Sat, 31 Jul 2021 02:29:07 GMT

Thanks,Bulate.

After reset,RESET_REQ_B constantly keep low. This signal is only pulled high by pull up resistor during reset.

So if I use the low RESET_REQ_B to trig a PORESET_B to LS1046A,the LS1046A would not run up and keep in reset state.

I've checked the LS1046A Reference Manual.It refers to that RESET_REQ_B is Negated-Indicates no reset request in table 4-3. Does it mean that RESET_REQ_B low issuses no reset request and high issuses reset request?

Best regards.

Re: LS1046A RSTCR register can not control RESET_REQ_B output?

flashingsky — Sat, 31 Jul 2021 08:52:04 GMT

Hi,Bulat: I've solved this problem.Thank you! You're right.Low state of RESET_REQ_B signal means that reset request is already issued.It is because serdes 2 module is not used in my application.I do not provide any clock to SD2_REF_CLK1/2.So after reset,SD2 PLL unlock will issue RESET_REQ_B to low which can be found in RSTRQSR1 register(SRDS_RST_RR bit).So after I power down SD2 PLL by RCW,RESET_REQ_B changes to high after reset. Then if I set RESET_REQ bit of RSTCR register,Low RESET_REQ_B can trig a PORESET to LS1046A. Best Regards!