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    <title>LayerscapeのトピックTWR-LS1021A gpio</title>
    <link>https://community.nxp.com/t5/Layerscape/TWR-LS1021A-gpio/m-p/482688#M858</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We are using TWR-LS1021A in our projects and we need to get at least two usable GPIO pins to make some simple LED indication.&lt;/P&gt;&lt;P&gt;As seen from the scheme of external connectors there are several "gpio" pins from FPGA/CPLD and maybe just 2 pins from ls1021a processor (GPIO3_13 and GPIO3_14).&lt;/P&gt;&lt;P&gt;We are using Yocto 1.7 SDK. It seems that in kernel configuration there are enabled options for controlling gpios via sysfs. Assuming that GPIO3_14 in sysfs mapped to gpio174 we tried to do something like&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;echo 174 &amp;gt; /sys/class/gpio/export&lt;/P&gt;&lt;P&gt;echo out &amp;gt; /sys/class/gpio174/direction&lt;/P&gt;&lt;P&gt;echo 1 &amp;gt; /sys/class/gpio174/value&lt;/P&gt;&lt;P&gt;echo 0 &amp;gt; /sys/class/gpio174/value&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But there is no activity on board's external pin.&lt;/P&gt;&lt;P&gt;So the questions are: &lt;/P&gt;&lt;P&gt;1) Is it correct mapping for GPIO3_14 in sysfs? &lt;/P&gt;&lt;P&gt;2) Do we need to do something else to use sysfs for controlling those two gpios (maybe rcw or dts editing)? &lt;/P&gt;&lt;P&gt;3) Is there a way to access to FPGA/CPLD gpio register and what we need to do for it? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt;Thank you in advance!&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 14 Dec 2015 09:18:42 GMT</pubDate>
    <dc:creator>leonidandronov2</dc:creator>
    <dc:date>2015-12-14T09:18:42Z</dc:date>
    <item>
      <title>TWR-LS1021A gpio</title>
      <link>https://community.nxp.com/t5/Layerscape/TWR-LS1021A-gpio/m-p/482688#M858</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We are using TWR-LS1021A in our projects and we need to get at least two usable GPIO pins to make some simple LED indication.&lt;/P&gt;&lt;P&gt;As seen from the scheme of external connectors there are several "gpio" pins from FPGA/CPLD and maybe just 2 pins from ls1021a processor (GPIO3_13 and GPIO3_14).&lt;/P&gt;&lt;P&gt;We are using Yocto 1.7 SDK. It seems that in kernel configuration there are enabled options for controlling gpios via sysfs. Assuming that GPIO3_14 in sysfs mapped to gpio174 we tried to do something like&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;echo 174 &amp;gt; /sys/class/gpio/export&lt;/P&gt;&lt;P&gt;echo out &amp;gt; /sys/class/gpio174/direction&lt;/P&gt;&lt;P&gt;echo 1 &amp;gt; /sys/class/gpio174/value&lt;/P&gt;&lt;P&gt;echo 0 &amp;gt; /sys/class/gpio174/value&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But there is no activity on board's external pin.&lt;/P&gt;&lt;P&gt;So the questions are: &lt;/P&gt;&lt;P&gt;1) Is it correct mapping for GPIO3_14 in sysfs? &lt;/P&gt;&lt;P&gt;2) Do we need to do something else to use sysfs for controlling those two gpios (maybe rcw or dts editing)? &lt;/P&gt;&lt;P&gt;3) Is there a way to access to FPGA/CPLD gpio register and what we need to do for it? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt;Thank you in advance!&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 14 Dec 2015 09:18:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/TWR-LS1021A-gpio/m-p/482688#M858</guid>
      <dc:creator>leonidandronov2</dc:creator>
      <dc:date>2015-12-14T09:18:42Z</dc:date>
    </item>
    <item>
      <title>Re: TWR-LS1021A gpio</title>
      <link>https://community.nxp.com/t5/Layerscape/TWR-LS1021A-gpio/m-p/482689#M859</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;Check RCW on your board. Check EC1 setting (bits &lt;/SPAN&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;416-418) of the RCW. &lt;/SPAN&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;See the Table 3-11 and the Table 4-14 of the LS1021A Reference Manual.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="EN-US" style="font-size: 10.0pt;"&gt;Usually the EC1 is set to 2 in the SDK. Change this setting to 1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Pavel&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 14 Dec 2015 12:22:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/TWR-LS1021A-gpio/m-p/482689#M859</guid>
      <dc:creator>Pavel</dc:creator>
      <dc:date>2015-12-14T12:22:36Z</dc:date>
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