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    <title>topic Re: RCW queries based on LS1043ARDB-PD reference board in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/RCW-queries-based-on-LS1043ARDB-PD-reference-board/m-p/1308523#M8462</link>
    <description>&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Will the processor respond without any issues if we change the voltage on LVDD from 1.8 V to 2.5 V rather than informing the processor to expect for 2.5V in LVDD.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;----&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;&lt;P&gt;Akshay V&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 15 Jul 2021 15:40:27 GMT</pubDate>
    <dc:creator>Akshayv</dc:creator>
    <dc:date>2021-07-15T15:40:27Z</dc:date>
    <item>
      <title>RCW queries based on LS1043ARDB-PD reference board</title>
      <link>https://community.nxp.com/t5/Layerscape/RCW-queries-based-on-LS1043ARDB-PD-reference-board/m-p/1306350#M8426</link>
      <description>&lt;P&gt;Following are the queries on RCW based on the LS1043ARDB-PD reference board:&lt;/P&gt;&lt;P&gt;1. What is the value of&amp;nbsp;&lt;SPAN&gt;C1_PLL_SEL in the RCW?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;2. Is there any provision to set&amp;nbsp;LVDD in the RCW similar to TVDD?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 12 Jul 2021 20:21:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/RCW-queries-based-on-LS1043ARDB-PD-reference-board/m-p/1306350#M8426</guid>
      <dc:creator>Abhilash_PV</dc:creator>
      <dc:date>2021-07-12T20:21:39Z</dc:date>
    </item>
    <item>
      <title>Re: RCW queries based on LS1043ARDB-PD reference board</title>
      <link>https://community.nxp.com/t5/Layerscape/RCW-queries-based-on-LS1043ARDB-PD-reference-board/m-p/1306501#M8433</link>
      <description>&lt;P&gt;1) RCW from the QorIQ LS1043A Reference Design Board Getting Started Guide:&lt;/P&gt;
&lt;P&gt;00000000: 08100010 0a000000 00000000 00000000&lt;BR /&gt;00000010: 14550002 80004012 e0025000 c1002000&lt;BR /&gt;00000020: 00000000 00000000 00000000 00038800&lt;BR /&gt;00000030: 00000000 00001101 00000096 00000001&lt;/P&gt;
&lt;P&gt;C1_PLL_SEL = 0b0000&lt;/P&gt;
&lt;P&gt;2) No.&lt;/P&gt;</description>
      <pubDate>Tue, 13 Jul 2021 03:29:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/RCW-queries-based-on-LS1043ARDB-PD-reference-board/m-p/1306501#M8433</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2021-07-13T03:29:42Z</dc:date>
    </item>
    <item>
      <title>Re: RCW queries based on LS1043ARDB-PD reference board</title>
      <link>https://community.nxp.com/t5/Layerscape/RCW-queries-based-on-LS1043ARDB-PD-reference-board/m-p/1308523#M8462</link>
      <description>&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Will the processor respond without any issues if we change the voltage on LVDD from 1.8 V to 2.5 V rather than informing the processor to expect for 2.5V in LVDD.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;----&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;&lt;P&gt;Akshay V&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 15 Jul 2021 15:40:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/RCW-queries-based-on-LS1043ARDB-PD-reference-board/m-p/1308523#M8462</guid>
      <dc:creator>Akshayv</dc:creator>
      <dc:date>2021-07-15T15:40:27Z</dc:date>
    </item>
    <item>
      <title>Re: RCW queries based on LS1043ARDB-PD reference board</title>
      <link>https://community.nxp.com/t5/Layerscape/RCW-queries-based-on-LS1043ARDB-PD-reference-board/m-p/1308524#M8463</link>
      <description>&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;How does the processor know the voltage selected for LVDD.&amp;nbsp;&lt;/P&gt;&lt;P&gt;LVDD is similar in logic like TVDD.&lt;/P&gt;&lt;P&gt;where, TVDD voltage level is informed to the processor through RCW settings.&lt;/P&gt;&lt;P&gt;So, will the processor respond without any issues if we change the voltage on LVDD from 1.8 V to 2.5 V rather than informing the processor to expect for 2.5V in LVDD.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;----&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;&lt;P&gt;Akshay V&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 15 Jul 2021 15:36:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/RCW-queries-based-on-LS1043ARDB-PD-reference-board/m-p/1308524#M8463</guid>
      <dc:creator>Akshayv</dc:creator>
      <dc:date>2021-07-15T15:36:32Z</dc:date>
    </item>
    <item>
      <title>Re: RCW queries based on LS1043ARDB-PD reference board</title>
      <link>https://community.nxp.com/t5/Layerscape/RCW-queries-based-on-LS1043ARDB-PD-reference-board/m-p/1308557#M8465</link>
      <description>&lt;P&gt;You wrote:&lt;/P&gt;
&lt;P&gt;&amp;gt; Is there any provision to set LVDD in the RCW similar to TVDD?&lt;/P&gt;
&lt;P&gt;The answer was: "No."&lt;/P&gt;
&lt;P&gt;Because LVDD-powered I/Os differ from TVDD-powered I/Os.&lt;/P&gt;</description>
      <pubDate>Thu, 15 Jul 2021 17:32:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/RCW-queries-based-on-LS1043ARDB-PD-reference-board/m-p/1308557#M8465</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2021-07-15T17:32:07Z</dc:date>
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