https://community.nxp.com/t5/Layerscape/ls1046ardb-NAND-and-CPLD/m-p/1297838#M8285 <P>On the LS1046ARDB, is the CPLD in the way of the NAND? I see some signal for the NAND go through the CPLD.</P><P>Is there any registers to be programmed in the CPLD to enable access to the NAND?</P><P>I am having difficulties accessing the NAND on my boot loader.</P><P>&nbsp;</P><P>Cheers,</P><P>Renaud</P> Thu, 24 Jun 2021 15:26:00 GMT renaud 2021-06-24T15:26:00Z https://community.nxp.com/t5/Layerscape/ls1046ardb-NAND-and-CPLD/m-p/1297838#M8285 <P>On the LS1046ARDB, is the CPLD in the way of the NAND? I see some signal for the NAND go through the CPLD.</P><P>Is there any registers to be programmed in the CPLD to enable access to the NAND?</P><P>I am having difficulties accessing the NAND on my boot loader.</P><P>&nbsp;</P><P>Cheers,</P><P>Renaud</P> Thu, 24 Jun 2021 15:26:00 GMT https://community.nxp.com/t5/Layerscape/ls1046ardb-NAND-and-CPLD/m-p/1297838#M8285 renaud 2021-06-24T15:26:00Z https://community.nxp.com/t5/Layerscape/ls1046ardb-NAND-and-CPLD/m-p/1298338#M8295 <P><SPAN class="emailMessageFeedItemBody"><SPAN class="emailMessageBody"> There are only two signals go through CPLD: NAND_CS_B and NAND_RB_B and they are statically assigned to ifc_cs0 and ifc_rb0.</SPAN></SPAN></P> Fri, 25 Jun 2021 09:09:35 GMT https://community.nxp.com/t5/Layerscape/ls1046ardb-NAND-and-CPLD/m-p/1298338#M8295 ufedor 2021-06-25T09:09:35Z