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    <title>topic Re: gpio test in U-boot for LS1021ATWR in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/gpio-test-in-U-boot-for-LS1021ATWR/m-p/1295141#M8242</link>
    <description>&lt;P&gt;=&amp;gt; mw 02320000 10000000&lt;BR /&gt;=&amp;gt; mw 02320008 10000000&lt;BR /&gt;=&amp;gt; md 02320000 4&lt;BR /&gt;02320000: 10000000 00000000 0000be15 0000be15 ................&lt;/P&gt;</description>
    <pubDate>Mon, 21 Jun 2021 05:12:16 GMT</pubDate>
    <dc:creator>niexuzhong</dc:creator>
    <dc:date>2021-06-21T05:12:16Z</dc:date>
    <item>
      <title>gpio test in U-boot for LS1021ATWR</title>
      <link>https://community.nxp.com/t5/Layerscape/gpio-test-in-U-boot-for-LS1021ATWR/m-p/1294519#M8233</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; I want to test the GPIO&amp;nbsp; function for LS1021ATWR for uboot, After I check schematic, I choose GPIO3_03 pin to test it. first I change EC1=1 in rcw file. then compile the rcw file and modify the uboot image. the&amp;nbsp; RCW&amp;nbsp; during start is as following:&lt;/P&gt;&lt;P&gt;00000000: 0608000a 00000000 00000000 00000000&lt;BR /&gt;00000010: 30000000 00007900 60040a00 21046000&lt;BR /&gt;00000020: 00000000 00000000 00000000 20000000&lt;BR /&gt;00000030: 00080000 281b7340 00000000 00000000&lt;/P&gt;&lt;P&gt;So the GPIO3[2:14]pin&amp;nbsp; had been set as GPIO pin. The B42 pin of primary connector is&amp;nbsp; GPIO3_03,&lt;/P&gt;&lt;P&gt;The GPIO3 direction register is 0x2320000, the data regsiter is 0x2320008. so I use command&amp;nbsp;&lt;/P&gt;&lt;P&gt;mw 0x02320000 8 1&amp;nbsp; to set GPIO3_03 as output. ,the 0x02320004 is 0x00000000, then I use command&lt;/P&gt;&lt;P&gt;mv 0x02320008 8 1&amp;nbsp;&lt;/P&gt;&lt;P&gt;but I check the voltage of B42. The voltage of B42 is still low. I don't know if there is error in my operations. Who can give me some suggestions? Thank you!&lt;/P&gt;</description>
      <pubDate>Fri, 18 Jun 2021 07:50:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/gpio-test-in-U-boot-for-LS1021ATWR/m-p/1294519#M8233</guid>
      <dc:creator>niexuzhong</dc:creator>
      <dc:date>2021-06-18T07:50:31Z</dc:date>
    </item>
    <item>
      <title>Re: gpio test in U-boot for LS1021ATWR</title>
      <link>https://community.nxp.com/t5/Layerscape/gpio-test-in-U-boot-for-LS1021ATWR/m-p/1294969#M8238</link>
      <description>&lt;P&gt;Please try:&lt;/P&gt;
&lt;P&gt;mw 0x02320000 10000000&lt;/P&gt;
&lt;P&gt;mw 0x02320008 10000000&lt;/P&gt;</description>
      <pubDate>Sat, 19 Jun 2021 09:59:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/gpio-test-in-U-boot-for-LS1021ATWR/m-p/1294969#M8238</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2021-06-19T09:59:59Z</dc:date>
    </item>
    <item>
      <title>Re: gpio test in U-boot for LS1021ATWR</title>
      <link>https://community.nxp.com/t5/Layerscape/gpio-test-in-U-boot-for-LS1021ATWR/m-p/1295045#M8240</link>
      <description>&lt;P&gt;mw 0x023200000 10000000&lt;/P&gt;&lt;P&gt;mw 0x023200008 10000000&lt;/P&gt;&lt;P&gt;Does such instruction is to test pin 28 of GPIO3? I test it as your instruction. but the result is same&lt;/P&gt;</description>
      <pubDate>Mon, 21 Jun 2021 01:00:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/gpio-test-in-U-boot-for-LS1021ATWR/m-p/1295045#M8240</guid>
      <dc:creator>niexuzhong</dc:creator>
      <dc:date>2021-06-21T01:00:56Z</dc:date>
    </item>
    <item>
      <title>Re: gpio test in U-boot for LS1021ATWR</title>
      <link>https://community.nxp.com/t5/Layerscape/gpio-test-in-U-boot-for-LS1021ATWR/m-p/1295129#M8241</link>
      <description>&lt;P&gt;After:&lt;/P&gt;
&lt;P&gt;mw 23200000 10000000&lt;/P&gt;
&lt;P&gt;mw 23200008 10000000&lt;/P&gt;
&lt;P&gt;Please provide output of:&lt;/P&gt;
&lt;P&gt;md 23200000 4&lt;/P&gt;</description>
      <pubDate>Mon, 21 Jun 2021 04:52:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/gpio-test-in-U-boot-for-LS1021ATWR/m-p/1295129#M8241</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2021-06-21T04:52:25Z</dc:date>
    </item>
    <item>
      <title>Re: gpio test in U-boot for LS1021ATWR</title>
      <link>https://community.nxp.com/t5/Layerscape/gpio-test-in-U-boot-for-LS1021ATWR/m-p/1295141#M8242</link>
      <description>&lt;P&gt;=&amp;gt; mw 02320000 10000000&lt;BR /&gt;=&amp;gt; mw 02320008 10000000&lt;BR /&gt;=&amp;gt; md 02320000 4&lt;BR /&gt;02320000: 10000000 00000000 0000be15 0000be15 ................&lt;/P&gt;</description>
      <pubDate>Mon, 21 Jun 2021 05:12:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/gpio-test-in-U-boot-for-LS1021ATWR/m-p/1295141#M8242</guid>
      <dc:creator>niexuzhong</dc:creator>
      <dc:date>2021-06-21T05:12:16Z</dc:date>
    </item>
    <item>
      <title>Re: gpio test in U-boot for LS1021ATWR</title>
      <link>https://community.nxp.com/t5/Layerscape/gpio-test-in-U-boot-for-LS1021ATWR/m-p/1295822#M8254</link>
      <description>&lt;P&gt;who can give me more suggestions? Thanks&lt;/P&gt;</description>
      <pubDate>Tue, 22 Jun 2021 05:40:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/gpio-test-in-U-boot-for-LS1021ATWR/m-p/1295822#M8254</guid>
      <dc:creator>niexuzhong</dc:creator>
      <dc:date>2021-06-22T05:40:01Z</dc:date>
    </item>
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