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    <title>topic LS1046A PBI in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/LS1046A-PBI/m-p/1292689#M8208</link>
    <description>&lt;P&gt;Question regarding the file&amp;nbsp;board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg&lt;/P&gt;&lt;P&gt;The scrachpad register 2 (BOOTLOCPTR)&lt;/P&gt;&lt;P&gt;09570604 10000000&lt;/P&gt;&lt;P&gt;Why is the address (0x10000000) is not pointing to QSPI flash (0x40100000) where U-boot is supposed to be?&lt;/P&gt;&lt;P&gt;Is not is used to boot from QSPI?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Cheers,&lt;/P&gt;&lt;P&gt;Renaud&lt;/P&gt;</description>
    <pubDate>Tue, 15 Jun 2021 15:48:51 GMT</pubDate>
    <dc:creator>renaud</dc:creator>
    <dc:date>2021-06-15T15:48:51Z</dc:date>
    <item>
      <title>LS1046A PBI</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046A-PBI/m-p/1292689#M8208</link>
      <description>&lt;P&gt;Question regarding the file&amp;nbsp;board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg&lt;/P&gt;&lt;P&gt;The scrachpad register 2 (BOOTLOCPTR)&lt;/P&gt;&lt;P&gt;09570604 10000000&lt;/P&gt;&lt;P&gt;Why is the address (0x10000000) is not pointing to QSPI flash (0x40100000) where U-boot is supposed to be?&lt;/P&gt;&lt;P&gt;Is not is used to boot from QSPI?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Cheers,&lt;/P&gt;&lt;P&gt;Renaud&lt;/P&gt;</description>
      <pubDate>Tue, 15 Jun 2021 15:48:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046A-PBI/m-p/1292689#M8208</guid>
      <dc:creator>renaud</dc:creator>
      <dc:date>2021-06-15T15:48:51Z</dc:date>
    </item>
    <item>
      <title>Re: LS1046A PBI</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046A-PBI/m-p/1292754#M8209</link>
      <description>&lt;P&gt;RCW sources actually used by LSDK are located here:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://source.codeaurora.org/external/qoriq/qoriq-components/rcw/tree/ls1046ardb?h=LSDK-20.12" target="_blank"&gt;https://source.codeaurora.org/external/qoriq/qoriq-components/rcw/tree/ls1046ardb?h=LSDK-20.12&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 15 Jun 2021 18:24:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046A-PBI/m-p/1292754#M8209</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2021-06-15T18:24:55Z</dc:date>
    </item>
    <item>
      <title>Re: LS1046A PBI</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046A-PBI/m-p/1293279#M8218</link>
      <description>&lt;P&gt;Seems my reply did not go through. SO hopefully not repeating myself&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;If build the QPSI SPL U-boot, the PBI contains&amp;nbsp;&lt;/P&gt;&lt;P&gt;0570604 10000000&lt;/P&gt;&lt;P&gt;This seems to be an OCRAM1 address. How does the CPU find the boot loader considering the file&amp;nbsp;spl/u-boot-spl.pbl starts with the RCW+PBI then the SPL?&lt;/P&gt;&lt;P&gt;Is the CPU executing sequentially after finding the hand of PBI?&lt;/P&gt;</description>
      <pubDate>Wed, 16 Jun 2021 13:11:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046A-PBI/m-p/1293279#M8218</guid>
      <dc:creator>renaud</dc:creator>
      <dc:date>2021-06-16T13:11:19Z</dc:date>
    </item>
    <item>
      <title>Re: LS1046A PBI</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046A-PBI/m-p/1296299#M8258</link>
      <description>&lt;DIV id="bodyDisplay_0" class="lia-message-body lia-component-message-view-widget-body lia-component-body-signature-highlight-escalation lia-component-message-view-widget-body-signature-highlight-escalation"&gt;
&lt;DIV class="lia-message-body-content"&gt;
&lt;P&gt;Please refer to RCW sources actually used by LSDK which are located here:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://source.codeaurora.org/external/qoriq/qoriq-components/rcw/tree/ls1046ardb?h=LSDK-20.12" target="_blank" rel="nofollow noopener noreferrer"&gt;https://source.codeaurora.org/external/qoriq/qoriq-components/rcw/tree/ls1046ardb?h=LSDK-20.12&lt;/A&gt;&lt;/P&gt;
&lt;/DIV&gt;
&lt;/DIV&gt;</description>
      <pubDate>Tue, 22 Jun 2021 17:05:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046A-PBI/m-p/1296299#M8258</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2021-06-22T17:05:23Z</dc:date>
    </item>
    <item>
      <title>Re: LS1046A PBI</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046A-PBI/m-p/1296765#M8262</link>
      <description>&lt;P&gt;Thanks. I understand how it works.&lt;/P&gt;&lt;P&gt;When booting from QSPI, the QSPI is mapped to the OCRAM and RCW+PBI+SPL executed from there.&lt;/P&gt;&lt;P&gt;Cheers,&lt;/P&gt;&lt;P&gt;Renaud&lt;/P&gt;</description>
      <pubDate>Wed, 23 Jun 2021 09:37:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046A-PBI/m-p/1296765#M8262</guid>
      <dc:creator>renaud</dc:creator>
      <dc:date>2021-06-23T09:37:04Z</dc:date>
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