<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: LS1046 DDR calibation Tool in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/LS1046-DDR-calibation-Tool/m-p/1256276#M7771</link>
    <description>&lt;P&gt;It is a mistake in the initialization script.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 02 Apr 2021 10:21:17 GMT</pubDate>
    <dc:creator>Bulat</dc:creator>
    <dc:date>2021-04-02T10:21:17Z</dc:date>
    <item>
      <title>LS1046 DDR calibation Tool</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046-DDR-calibation-Tool/m-p/1251172#M7722</link>
      <description>&lt;P&gt;Hi ,&lt;/P&gt;&lt;P&gt;We are having LS1046ardb evk with 16GB DDR . But the default binary from NXP does not boot due to timing parameter mismatch. Please let us know which tool we need to use for DDR calibration. Since we are familiar in imx series process. But for LS series we are not&amp;nbsp; sure which tool to use.&lt;/P&gt;&lt;P&gt;NOTICE: UDIMM 18ADF2G72AZ-2G6E1&lt;BR /&gt;ERROR: Board parameters no match.&lt;BR /&gt;ERROR: Failed matching board timing.&lt;BR /&gt;ERROR: Found training error(s): 0x2100&lt;BR /&gt;ERROR: Error: Waiting for D_INIT timeout.&lt;BR /&gt;ERROR: Writing DDR register(s) failed&lt;BR /&gt;ERROR: Programing DDRC error&lt;BR /&gt;ERROR: DDR init failed.&lt;BR /&gt;NOTICE: Incorrect DRAM0 size is defined in platfor_def.h&lt;BR /&gt;ERROR: mmap_add_region_check() failed. error -22&lt;BR /&gt;ERROR: mmap_add_region_check() failed. error -22&lt;BR /&gt;NOTICE: BL2: v1.5(release):LSDK-20.04-update-290520-dirty&lt;BR /&gt;NOTICE: BL2: Built : 13:29:29, Mar 24 2021&lt;BR /&gt;ERROR: SD read error - DMA error = 10000000&lt;BR /&gt;ERROR: Read error = fffffffb&lt;BR /&gt;ERROR: BL2: Failed to load image (-2)&lt;BR /&gt;Authentication failure&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;Deepanraj.A&lt;/P&gt;</description>
      <pubDate>Wed, 24 Mar 2021 11:06:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046-DDR-calibation-Tool/m-p/1251172#M7722</guid>
      <dc:creator>deepanrajanbara</dc:creator>
      <dc:date>2021-03-24T11:06:35Z</dc:date>
    </item>
    <item>
      <title>Re: LS1046 DDR calibation Tool</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046-DDR-calibation-Tool/m-p/1251842#M7740</link>
      <description>&lt;P&gt;Error happens in your case due to UDIMM type, not due to timing issue. I can suggest a modification of TFA boot sw to overcome the issue, this relates to file&lt;/P&gt;
&lt;P&gt;\plat\nxp\soc-ls1046\ls1046ardb\ddr_init.c.&lt;/P&gt;
&lt;P&gt;Following code needs to be changed.&lt;/P&gt;
&lt;P&gt;Was:&lt;BR /&gt;-----------&lt;BR /&gt;static const struct board_timing udimm[] = {&lt;BR /&gt;{0x04, rce, 0x01020304, 0x06070805},&lt;BR /&gt;};&lt;BR /&gt;-----------&lt;BR /&gt;Modified:&lt;BR /&gt;-----------&lt;BR /&gt;static const struct board_timing udimm[] = {&lt;BR /&gt;{0x04, rce, 0x01020304, 0x06070805},&lt;BR /&gt;{0x0F, rce, 0x01020304, 0x06070805},&lt;BR /&gt;};&lt;BR /&gt;-----------&lt;/P&gt;
&lt;P&gt;Please try.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Bulat&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 25 Mar 2021 06:05:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046-DDR-calibation-Tool/m-p/1251842#M7740</guid>
      <dc:creator>Bulat</dc:creator>
      <dc:date>2021-03-25T06:05:41Z</dc:date>
    </item>
    <item>
      <title>Re: LS1046 DDR calibation Tool</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046-DDR-calibation-Tool/m-p/1251995#M7741</link>
      <description>&lt;P&gt;Can you please let us know, what this change corresponds too. After this change it seemed to boot with no issue.&lt;/P&gt;&lt;P&gt;Please explain to us what is the reason for this change is there any document which we can check to know about these changes.&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;Deepanraj.A&lt;/P&gt;</description>
      <pubDate>Thu, 25 Mar 2021 09:09:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046-DDR-calibation-Tool/m-p/1251995#M7741</guid>
      <dc:creator>deepanrajanbara</dc:creator>
      <dc:date>2021-03-25T09:09:21Z</dc:date>
    </item>
    <item>
      <title>Re: LS1046 DDR calibation Tool</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046-DDR-calibation-Tool/m-p/1253482#M7754</link>
      <description>&lt;P&gt;When we try to program a Bareboard hello world application via code warrior IDE . We are getting a similar error as below. Please help us debug this issue.&lt;/P&gt;&lt;P&gt;Cannot write data at address 0x80000000&lt;/P&gt;&lt;P&gt;As it is EVK . Binary has to work without any problem . But due to the RAM change it is not able to program&amp;nbsp; the binary&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Deepanraj.A&lt;/P&gt;</description>
      <pubDate>Mon, 29 Mar 2021 09:27:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046-DDR-calibation-Tool/m-p/1253482#M7754</guid>
      <dc:creator>deepanrajanbara</dc:creator>
      <dc:date>2021-03-29T09:27:35Z</dc:date>
    </item>
    <item>
      <title>Re: LS1046 DDR calibation Tool</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046-DDR-calibation-Tool/m-p/1256276#M7771</link>
      <description>&lt;P&gt;It is a mistake in the initialization script.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 02 Apr 2021 10:21:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046-DDR-calibation-Tool/m-p/1256276#M7771</guid>
      <dc:creator>Bulat</dc:creator>
      <dc:date>2021-04-02T10:21:17Z</dc:date>
    </item>
  </channel>
</rss>

