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    <title>topic Re: LS1046A Register Set in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/LS1046A-Register-Set/m-p/1220429#M7384</link>
    <description>&lt;P&gt;The register is directly mapped into the processor's address space.&lt;/P&gt;
&lt;P&gt;The register address is:&lt;/P&gt;
&lt;P&gt;LUT base address + 0x4_0210&lt;/P&gt;
&lt;P&gt;PEX1 LUT base address: 348_0000h&lt;BR /&gt;PEX2 LUT base address: 358_0000h&lt;BR /&gt;PEX3 LUT base address: 368_0000h&lt;/P&gt;
&lt;P&gt;(refer to the QorIQ LS1046A Reference Manual, 25.5.1.1 PEX_LUT Memory map).&lt;/P&gt;
&lt;P&gt;Also, consider that the register is big-endian (byte swapping is required)&lt;/P&gt;</description>
    <pubDate>Mon, 25 Jan 2021 10:03:06 GMT</pubDate>
    <dc:creator>ufedor</dc:creator>
    <dc:date>2021-01-25T10:03:06Z</dc:date>
    <item>
      <title>LS1046A Register Set</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046A-Register-Set/m-p/1220350#M7382</link>
      <description>&lt;P&gt;I use ls1046a which is based lsdk2004.&lt;/P&gt;&lt;P&gt;I try to set value of register field which is&amp;nbsp;The PEX PFa error disable register.&lt;/P&gt;&lt;P&gt;May i have the way how to set register filed?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;* QorIQ LS1046A Reference Manual, Rev. 2.1, 02/2020&lt;/P&gt;&lt;P&gt;[ Register Info ]&lt;/P&gt;&lt;P&gt;25.5.1.17.1 Offset&lt;/P&gt;&lt;P&gt;Register Offset&lt;BR /&gt;PEX_PF0_ERR_DISR 4_0210h&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;25.5.1.17.2 Function&lt;BR /&gt;The PEX PFa error disable register. disables detection of errors in PEX_ERR_DET.&lt;BR /&gt;25.5.1.17.3 Diagram&lt;BR /&gt;Bits 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15&lt;BR /&gt;R&lt;BR /&gt;MED&lt;BR /&gt;Reserved&lt;BR /&gt;PCTD&lt;BR /&gt;Reserved&lt;BR /&gt;PCACD&lt;BR /&gt;Reserved&lt;BR /&gt;CDNSCD&lt;BR /&gt;Reserved&lt;BR /&gt;W&lt;BR /&gt;W1C&lt;BR /&gt;Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0&lt;BR /&gt;Bits 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31&lt;BR /&gt;R&lt;BR /&gt;Reserved&lt;BR /&gt;UREP&lt;BR /&gt;D&lt;BR /&gt;Reserved&lt;BR /&gt;W&lt;BR /&gt;Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0&lt;BR /&gt;25.5.1.17.4 Fields&lt;BR /&gt;Field Function&lt;BR /&gt;0&lt;BR /&gt;MED&lt;BR /&gt;ME: Multiple errors of same type detection disable. 1'b1: Multiple errors of same type detection disabled.&lt;BR /&gt;1'b0: Multiple errors of same type detection enabled.&lt;BR /&gt;1-7&lt;BR /&gt;—&lt;BR /&gt;Reserved&lt;BR /&gt;8&lt;BR /&gt;PCTD&lt;BR /&gt;PCTIE: completion detection disable. 1'b1: Completion timeout detection disabled. 1'b0: Completion&lt;BR /&gt;timeout detection enabled.&lt;BR /&gt;9&lt;BR /&gt;—&lt;BR /&gt;Reserved&lt;BR /&gt;10&lt;BR /&gt;PCACD&lt;BR /&gt;PCACD: Completer abort detection disable. 1'b1: Completer abort detection disabled. 1'b0: Completer&lt;BR /&gt;abort detection enabled.&lt;BR /&gt;11&lt;BR /&gt;—&lt;BR /&gt;Reserved&lt;/P&gt;</description>
      <pubDate>Mon, 25 Jan 2021 08:25:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046A-Register-Set/m-p/1220350#M7382</guid>
      <dc:creator>JSKIM</dc:creator>
      <dc:date>2021-01-25T08:25:53Z</dc:date>
    </item>
    <item>
      <title>Re: LS1046A Register Set</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046A-Register-Set/m-p/1220429#M7384</link>
      <description>&lt;P&gt;The register is directly mapped into the processor's address space.&lt;/P&gt;
&lt;P&gt;The register address is:&lt;/P&gt;
&lt;P&gt;LUT base address + 0x4_0210&lt;/P&gt;
&lt;P&gt;PEX1 LUT base address: 348_0000h&lt;BR /&gt;PEX2 LUT base address: 358_0000h&lt;BR /&gt;PEX3 LUT base address: 368_0000h&lt;/P&gt;
&lt;P&gt;(refer to the QorIQ LS1046A Reference Manual, 25.5.1.1 PEX_LUT Memory map).&lt;/P&gt;
&lt;P&gt;Also, consider that the register is big-endian (byte swapping is required)&lt;/P&gt;</description>
      <pubDate>Mon, 25 Jan 2021 10:03:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046A-Register-Set/m-p/1220429#M7384</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2021-01-25T10:03:06Z</dc:date>
    </item>
    <item>
      <title>Re: LS1046A Register Set</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046A-Register-Set/m-p/1223118#M7420</link>
      <description>&lt;P&gt;thanks for response.&lt;/P&gt;</description>
      <pubDate>Fri, 29 Jan 2021 07:25:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046A-Register-Set/m-p/1223118#M7420</guid>
      <dc:creator>JSKIM</dc:creator>
      <dc:date>2021-01-29T07:25:14Z</dc:date>
    </item>
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