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    <title>Layerscape中的主题 Re: How to access SRAM using IFC in Linux?</title>
    <link>https://community.nxp.com/t5/Layerscape/How-to-access-SRAM-using-IFC-in-Linux/m-p/1217585#M7359</link>
    <description>&lt;P&gt;&lt;SPAN&gt;SRAM should be connected to IFC in GPCM mode, but we don't have GPCM driver for ARM processors. You need to develop by yourself. You can take eLBC/GPCM driver for PowerPC as reference.&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Wed, 20 Jan 2021 03:55:23 GMT</pubDate>
    <dc:creator>yipingwang</dc:creator>
    <dc:date>2021-01-20T03:55:23Z</dc:date>
    <item>
      <title>How to access SRAM using IFC in Linux?</title>
      <link>https://community.nxp.com/t5/Layerscape/How-to-access-SRAM-using-IFC-in-Linux/m-p/1212995#M7351</link>
      <description>&lt;P&gt;Hello.&lt;/P&gt;&lt;P&gt;We making a custom board by referring to LS1043A. Booting is the same as the reference board, and it seems to be boot from SDHC.&lt;BR /&gt;But after booting into Linux, we need to read/write data to SRAM.&lt;/P&gt;&lt;P&gt;In this case, there are two questions.&lt;/P&gt;&lt;P&gt;1. how to change the device tree?&lt;BR /&gt;In general, the device tree as follows:&lt;/P&gt;&lt;P&gt;&amp;amp;ifc {&lt;BR /&gt;status = "okay";&lt;BR /&gt;#address-cells = &amp;lt;2&amp;gt;;&lt;BR /&gt;#size-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt;/* NOR, NAND Flashes and FPGA on board */&lt;BR /&gt;ranges = &amp;lt;0x0 0x0 0x0 0x60000000 0x08000000&lt;BR /&gt;0x1 0x0 0x0 0x7e800000 0x00010000&lt;BR /&gt;0x2 0x0 0x0 0x7fb00000 0x00000100&amp;gt;;&lt;/P&gt;&lt;P&gt;nor@0,0 {&lt;BR /&gt;compatible = "cfi-flash";&lt;BR /&gt;#address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt;#size-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt;reg = &amp;lt;0x0 0x0 0x8000000&amp;gt;;&lt;BR /&gt;big-endian;&lt;BR /&gt;bank-width = &amp;lt;2&amp;gt;;&lt;BR /&gt;device-width = &amp;lt;1&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;nand@1,0 {&lt;BR /&gt;compatible = "fsl,ifc-nand";&lt;BR /&gt;#address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt;#size-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt;reg = &amp;lt;0x1 0x0 0x10000&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;cpld: board-control@2,0 {&lt;BR /&gt;compatible = "fsl,ls1043ardb-cpld";&lt;BR /&gt;reg = &amp;lt;0x2 0x0 0x0000100&amp;gt;;&lt;BR /&gt;};&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;But if use SRAM instead of NAND, How to modified?&amp;nbsp;Especially compatible.&lt;/P&gt;&lt;P&gt;Second, if the device is recognized by IFC, how should it be used?&lt;BR /&gt;Previously, it was recognized as MTD but SRAM needs to input/output raw data. Can I use it as it is?&lt;/P&gt;&lt;P&gt;Best regards.&lt;BR /&gt;Thanks.&lt;/P&gt;</description>
      <pubDate>Mon, 18 Jan 2021 06:25:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/How-to-access-SRAM-using-IFC-in-Linux/m-p/1212995#M7351</guid>
      <dc:creator>hakjunoh</dc:creator>
      <dc:date>2021-01-18T06:25:34Z</dc:date>
    </item>
    <item>
      <title>Re: How to access SRAM using IFC in Linux?</title>
      <link>https://community.nxp.com/t5/Layerscape/How-to-access-SRAM-using-IFC-in-Linux/m-p/1217585#M7359</link>
      <description>&lt;P&gt;&lt;SPAN&gt;SRAM should be connected to IFC in GPCM mode, but we don't have GPCM driver for ARM processors. You need to develop by yourself. You can take eLBC/GPCM driver for PowerPC as reference.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 20 Jan 2021 03:55:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/How-to-access-SRAM-using-IFC-in-Linux/m-p/1217585#M7359</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2021-01-20T03:55:23Z</dc:date>
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