<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>LayerscapeのトピックRe: LX2160A  System Memory Map</title>
    <link>https://community.nxp.com/t5/Layerscape/LX2160A-System-Memory-Map/m-p/1081633#M6341</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;gt; the ddr ram&amp;nbsp; is&amp;nbsp; maped to&amp;nbsp;diffrent&amp;nbsp;&amp;nbsp;&lt;SPAN&gt;divided&amp;nbsp; address ??&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Yes - refer to the QorIQ LX2160A Reference Manual, 2.2 System Memory Map.&lt;/P&gt;&lt;P&gt;According to the ARM Architecture SoC address to DRAM address remapping is preformed for the LX2160A as follows:&lt;/P&gt;&lt;TABLE style="margin-left: 6.5pt; border: none;"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD style="border: 1pt solid windowtext; padding: 0cm; text-align: center;" width="228"&gt;&lt;P style="margin-left: .85pt;"&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;&lt;STRONG&gt;SoC Address&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD style="border-color: windowtext windowtext windowtext currentcolor; border-style: solid solid solid none; border-width: 1pt 1pt 1pt medium; border-image: none 100% / 1 / 0 stretch; padding: 0cm; text-align: center;" width="71"&gt;&lt;P style="margin: 1.5pt 1.7pt .0001pt 0cm;"&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;&lt;STRONG&gt;Size&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD style="border-color: windowtext windowtext windowtext currentcolor; border-style: solid solid solid none; border-width: 1pt 1pt 1pt medium; border-image: none 100% / 1 / 0 stretch; padding: 0cm; text-align: center;" width="260"&gt;&lt;P style="margin: 1.5pt 1.2pt .0001pt 4.8pt;"&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;&lt;STRONG&gt;Address presented to the DDR Controller&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style="border-color: currentcolor windowtext windowtext; border-style: none solid solid; border-width: medium 1pt 1pt; border-image: none 100% / 1 / 0 stretch; padding: 0cm; text-align: center;" width="228"&gt;&lt;P&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;0x00_8000_0000 - 0x00_FFFF_FFFF&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD style="border-color: currentcolor windowtext windowtext currentcolor; border-style: none solid solid none; border-width: medium 1pt 1pt medium; padding: 0cm; text-align: center;" width="71"&gt;&lt;P&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;2GB&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD style="border-color: currentcolor windowtext windowtext currentcolor; border-style: none solid solid none; border-width: medium 1pt 1pt medium; padding: 0cm; text-align: center;" width="260"&gt;&lt;P style="margin-left: 2.45pt;"&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;0x00_0000_0000 - 0x00_7FFF_FFFF&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style="border-color: currentcolor windowtext windowtext; border-style: none solid solid; border-width: medium 1pt 1pt; border-image: none 100% / 1 / 0 stretch; padding: 0cm; text-align: center;" width="228"&gt;&lt;P&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;0x20_8000_0000 - 0x3F_FFFF_FFFF&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD style="border-color: currentcolor windowtext windowtext currentcolor; border-style: none solid solid none; border-width: medium 1pt 1pt medium; padding: 0cm; text-align: center;" width="71"&gt;&lt;P&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;126GB&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD style="border-color: currentcolor windowtext windowtext currentcolor; border-style: none solid solid none; border-width: medium 1pt 1pt medium; padding: 0cm; text-align: center;" width="260"&gt;&lt;P style="margin-left: 2.45pt;"&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;0x00_8000_0000 - 0x1F_FFFF_FFFF&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style="border-color: currentcolor windowtext windowtext; border-style: none solid solid; border-width: medium 1pt 1pt; border-image: none 100% / 1 / 0 stretch; padding: 0cm; text-align: center;" width="228"&gt;&lt;P&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;0x60_0000_0000 - 0x7F_FFFF_FFFF&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD style="border-color: currentcolor windowtext windowtext currentcolor; border-style: none solid solid none; border-width: medium 1pt 1pt medium; padding: 0cm; text-align: center;" width="71"&gt;&lt;P&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;128GB&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD style="border-color: currentcolor windowtext windowtext currentcolor; border-style: none solid solid none; border-width: medium 1pt 1pt medium; padding: 0cm; text-align: center;" width="260"&gt;&lt;P style="margin-left: 2.45pt;"&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;0x20_0000_0000 - 0x3F_FFFF_FFFF&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 11 Aug 2020 10:25:34 GMT</pubDate>
    <dc:creator>ufedor</dc:creator>
    <dc:date>2020-08-11T10:25:34Z</dc:date>
    <item>
      <title>LX2160A  System Memory Map</title>
      <link>https://community.nxp.com/t5/Layerscape/LX2160A-System-Memory-Map/m-p/1081632#M6340</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;in&amp;nbsp; LX2160ARM.pdf ,&amp;nbsp;&amp;nbsp;System Memory Map,&amp;nbsp; &amp;nbsp;the ddr ram map the&amp;nbsp;&lt;SPAN&gt;0x0000_8000_0000&lt;/SPAN&gt;&amp;nbsp; ,&amp;nbsp; but this region&amp;nbsp; is only 2G.&amp;nbsp; &amp;nbsp;&amp;nbsp;LX2160A-RDB board have 2 ddr slot,&amp;nbsp; if have 256G&amp;nbsp; ddr ,&amp;nbsp; &amp;nbsp;what address it map ???&lt;/P&gt;&lt;P&gt;the ddr ram&amp;nbsp; is&amp;nbsp; maped to&amp;nbsp;diffrent&amp;nbsp;&amp;nbsp;&lt;SPAN&gt;divided&amp;nbsp; address ??&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;like this ?&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;0x0000_8000_0000 ------&amp;nbsp; &amp;nbsp;0x0000_9FFF_FFFF&amp;nbsp; &amp;nbsp; &amp;nbsp; (2G)&lt;/SPAN&gt;&lt;SPAN&gt;&lt;BR /&gt;0x0020_8000_0000&amp;nbsp;------&amp;nbsp;&amp;nbsp;&amp;nbsp;0x003F_FFFF_FFFF&amp;nbsp; &amp;nbsp; &amp;nbsp; (128G)&lt;BR style="font-weight: normal;" /&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;0x0060_0000_0000 ----&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;(126G)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;thanks&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 11 Aug 2020 07:30:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LX2160A-System-Memory-Map/m-p/1081632#M6340</guid>
      <dc:creator>156614400</dc:creator>
      <dc:date>2020-08-11T07:30:28Z</dc:date>
    </item>
    <item>
      <title>Re: LX2160A  System Memory Map</title>
      <link>https://community.nxp.com/t5/Layerscape/LX2160A-System-Memory-Map/m-p/1081633#M6341</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;gt; the ddr ram&amp;nbsp; is&amp;nbsp; maped to&amp;nbsp;diffrent&amp;nbsp;&amp;nbsp;&lt;SPAN&gt;divided&amp;nbsp; address ??&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Yes - refer to the QorIQ LX2160A Reference Manual, 2.2 System Memory Map.&lt;/P&gt;&lt;P&gt;According to the ARM Architecture SoC address to DRAM address remapping is preformed for the LX2160A as follows:&lt;/P&gt;&lt;TABLE style="margin-left: 6.5pt; border: none;"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD style="border: 1pt solid windowtext; padding: 0cm; text-align: center;" width="228"&gt;&lt;P style="margin-left: .85pt;"&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;&lt;STRONG&gt;SoC Address&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD style="border-color: windowtext windowtext windowtext currentcolor; border-style: solid solid solid none; border-width: 1pt 1pt 1pt medium; border-image: none 100% / 1 / 0 stretch; padding: 0cm; text-align: center;" width="71"&gt;&lt;P style="margin: 1.5pt 1.7pt .0001pt 0cm;"&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;&lt;STRONG&gt;Size&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD style="border-color: windowtext windowtext windowtext currentcolor; border-style: solid solid solid none; border-width: 1pt 1pt 1pt medium; border-image: none 100% / 1 / 0 stretch; padding: 0cm; text-align: center;" width="260"&gt;&lt;P style="margin: 1.5pt 1.2pt .0001pt 4.8pt;"&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;&lt;STRONG&gt;Address presented to the DDR Controller&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style="border-color: currentcolor windowtext windowtext; border-style: none solid solid; border-width: medium 1pt 1pt; border-image: none 100% / 1 / 0 stretch; padding: 0cm; text-align: center;" width="228"&gt;&lt;P&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;0x00_8000_0000 - 0x00_FFFF_FFFF&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD style="border-color: currentcolor windowtext windowtext currentcolor; border-style: none solid solid none; border-width: medium 1pt 1pt medium; padding: 0cm; text-align: center;" width="71"&gt;&lt;P&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;2GB&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD style="border-color: currentcolor windowtext windowtext currentcolor; border-style: none solid solid none; border-width: medium 1pt 1pt medium; padding: 0cm; text-align: center;" width="260"&gt;&lt;P style="margin-left: 2.45pt;"&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;0x00_0000_0000 - 0x00_7FFF_FFFF&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style="border-color: currentcolor windowtext windowtext; border-style: none solid solid; border-width: medium 1pt 1pt; border-image: none 100% / 1 / 0 stretch; padding: 0cm; text-align: center;" width="228"&gt;&lt;P&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;0x20_8000_0000 - 0x3F_FFFF_FFFF&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD style="border-color: currentcolor windowtext windowtext currentcolor; border-style: none solid solid none; border-width: medium 1pt 1pt medium; padding: 0cm; text-align: center;" width="71"&gt;&lt;P&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;126GB&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD style="border-color: currentcolor windowtext windowtext currentcolor; border-style: none solid solid none; border-width: medium 1pt 1pt medium; padding: 0cm; text-align: center;" width="260"&gt;&lt;P style="margin-left: 2.45pt;"&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;0x00_8000_0000 - 0x1F_FFFF_FFFF&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD style="border-color: currentcolor windowtext windowtext; border-style: none solid solid; border-width: medium 1pt 1pt; border-image: none 100% / 1 / 0 stretch; padding: 0cm; text-align: center;" width="228"&gt;&lt;P&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;0x60_0000_0000 - 0x7F_FFFF_FFFF&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD style="border-color: currentcolor windowtext windowtext currentcolor; border-style: none solid solid none; border-width: medium 1pt 1pt medium; padding: 0cm; text-align: center;" width="71"&gt;&lt;P&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;128GB&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;TD style="border-color: currentcolor windowtext windowtext currentcolor; border-style: none solid solid none; border-width: medium 1pt 1pt medium; padding: 0cm; text-align: center;" width="260"&gt;&lt;P style="margin-left: 2.45pt;"&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;0x20_0000_0000 - 0x3F_FFFF_FFFF&lt;/SPAN&gt;&lt;/P&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 11 Aug 2020 10:25:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LX2160A-System-Memory-Map/m-p/1081633#M6341</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2020-08-11T10:25:34Z</dc:date>
    </item>
  </channel>
</rss>

