Layerscape中的主题 eTSEC1 in MII and eTsec3 in RGMII mode https://community.nxp.com/t5/Layerscape/eTSEC1-in-MII-and-eTsec3-in-RGMII-mode/m-p/1057993#M6039 <HTML><HEAD></HEAD><BODY><P>Hi</P><P>According to <A _jive_internal="true" href="https://community.nxp.com/thread/534679">this</A> answer we decided to use eTSEC1 in MII and eTsec3 in RGMII mode but connect both L1VDD and LVDD to 2.5v and manage possible MII problems with timing barriers of course another side of this MII interace is supporting 2.5v.</P><P>But we have another problem with some sentences in AN4878 table 31 that <EM>"When eTSEC 1 or eTSEC 2 are configured as MII mode some of the MII 1 and MII 2 signals are muxed with eTSEC3 signals. In the RCW configuration eTSEC 3 must be selected as MII"</EM> .</P><P><span class="lia-inline-image-display-wrapper" image-alt="AN4878.jpg"><img src="https://community.nxp.com/t5/image/serverpage/image-id/109261i51EEA5D1D1AF1B54/image-size/large?v=v2&amp;px=999" role="button" title="AN4878.jpg" alt="AN4878.jpg" /></span></P><P>does it mean that RCW[EC3] can not be set 000 when we use eTSEC1 in MII? It should be said that MII optional pins not used in our design.</P><P><span class="lia-inline-image-display-wrapper" image-alt="1021RM.jpg"><img src="https://community.nxp.com/t5/image/serverpage/image-id/109351i6A0A8D3E1567DC33/image-size/large?v=v2&amp;px=999" role="button" title="1021RM.jpg" alt="1021RM.jpg" /></span></P><P>Refer to table 4-14 of LS1021RM we want to set RCW[EC1]=011(MII) and RCW[EC3]=000(RGMII). this doesn't cause any conflict in register settings. May we assume it is possible?</P><P></P><P>Best Regards</P><P>Noghteh</P></BODY></HTML> Sun, 23 Aug 2020 03:15:05 GMT senoghte 2020-08-23T03:15:05Z eTSEC1 in MII and eTsec3 in RGMII mode https://community.nxp.com/t5/Layerscape/eTSEC1-in-MII-and-eTsec3-in-RGMII-mode/m-p/1057993#M6039 <HTML><HEAD></HEAD><BODY><P>Hi</P><P>According to <A _jive_internal="true" href="https://community.nxp.com/thread/534679">this</A> answer we decided to use eTSEC1 in MII and eTsec3 in RGMII mode but connect both L1VDD and LVDD to 2.5v and manage possible MII problems with timing barriers of course another side of this MII interace is supporting 2.5v.</P><P>But we have another problem with some sentences in AN4878 table 31 that <EM>"When eTSEC 1 or eTSEC 2 are configured as MII mode some of the MII 1 and MII 2 signals are muxed with eTSEC3 signals. In the RCW configuration eTSEC 3 must be selected as MII"</EM> .</P><P><span class="lia-inline-image-display-wrapper" image-alt="AN4878.jpg"><img src="https://community.nxp.com/t5/image/serverpage/image-id/109261i51EEA5D1D1AF1B54/image-size/large?v=v2&amp;px=999" role="button" title="AN4878.jpg" alt="AN4878.jpg" /></span></P><P>does it mean that RCW[EC3] can not be set 000 when we use eTSEC1 in MII? It should be said that MII optional pins not used in our design.</P><P><span class="lia-inline-image-display-wrapper" image-alt="1021RM.jpg"><img src="https://community.nxp.com/t5/image/serverpage/image-id/109351i6A0A8D3E1567DC33/image-size/large?v=v2&amp;px=999" role="button" title="1021RM.jpg" alt="1021RM.jpg" /></span></P><P>Refer to table 4-14 of LS1021RM we want to set RCW[EC1]=011(MII) and RCW[EC3]=000(RGMII). this doesn't cause any conflict in register settings. May we assume it is possible?</P><P></P><P>Best Regards</P><P>Noghteh</P></BODY></HTML> Sun, 23 Aug 2020 03:15:05 GMT https://community.nxp.com/t5/Layerscape/eTSEC1-in-MII-and-eTsec3-in-RGMII-mode/m-p/1057993#M6039 senoghte 2020-08-23T03:15:05Z Re: eTSEC1 in MII and eTsec3 in RGMII mode https://community.nxp.com/t5/Layerscape/eTSEC1-in-MII-and-eTsec3-in-RGMII-mode/m-p/1057994#M6040 <HTML><HEAD></HEAD><BODY><P>EC3 must be 011 for MII support.</P></BODY></HTML> Mon, 24 Aug 2020 03:39:05 GMT https://community.nxp.com/t5/Layerscape/eTSEC1-in-MII-and-eTsec3-in-RGMII-mode/m-p/1057994#M6040 ufedor 2020-08-24T03:39:05Z