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<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>LayerscapeのトピックRe: LS1028: could not attach to PHY</title>
    <link>https://community.nxp.com/t5/Layerscape/LS1028-could-not-attach-to-PHY/m-p/1034487#M5775</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;It is always reasonable to provide files as attachments and not inline.&lt;/P&gt;&lt;P&gt;Provided DTS seems to be incomplete - it lacks at least one closing "}".&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please try to generate LSDK composite firmware as described in the Layerscape Software Development Kit User Guide.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 17 Mar 2020 10:01:23 GMT</pubDate>
    <dc:creator>ufedor</dc:creator>
    <dc:date>2020-03-17T10:01:23Z</dc:date>
    <item>
      <title>LS1028: could not attach to PHY</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1028-could-not-attach-to-PHY/m-p/1034484#M5772</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a problem with connecting to Ethernet(SGMII and RGMII) in our custom board based on LS1028.&lt;/P&gt;&lt;P&gt;Please find the output from connecting to SGMII and RGMII below:&lt;/P&gt;&lt;P&gt;root@root:~# ip link set up eth0&lt;BR /&gt;[ 344.709641] net eth0: could not attach to PHY&lt;BR /&gt;ip: SIOCSIFFLAGS: No such device&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;root@&lt;/SPAN&gt;&lt;SPAN&gt;root&lt;/SPAN&gt;&lt;SPAN&gt;:~# ip link set up eth1&lt;/SPAN&gt;&lt;BR /&gt;[ 397.709310] net eth1: could not attach to PHY&lt;/P&gt;&lt;P&gt;ip: SIOCSIFFLAGS: No such device&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;The eth dts configuration:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;amp;enetc_port0 {&lt;BR /&gt; phy-handle = &amp;lt;&amp;amp;sgmii_phy0&amp;gt;;&lt;BR /&gt; phy-connection-type = "sgmii";&lt;/P&gt;&lt;P&gt;mdio {&lt;BR /&gt; #address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt; #size-cells = &amp;lt;0&amp;gt;;&lt;BR /&gt; sgmii_phy0: ethernet-phy@2 {&lt;BR /&gt; reg = &amp;lt;0x2&amp;gt;;&lt;BR /&gt; max-speed = &amp;lt;1000&amp;gt;;&lt;BR /&gt;// interrupt-parent = &amp;lt;&amp;amp;gpio1&amp;gt;;&lt;BR /&gt;// interrupts = &amp;lt;25 IRQ_TYPE_EDGE_FALLING&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; };&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;amp;enetc_port1 {&lt;BR /&gt; phy-handle = &amp;lt;&amp;amp;rgmii_phy0&amp;gt;;&lt;BR /&gt; phy-connection-type = "rgmii";&lt;BR /&gt; &lt;BR /&gt; mdio {&lt;BR /&gt; #address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt; #size-cells = &amp;lt;0&amp;gt;;&lt;BR /&gt; rgmii_phy0: ethernet-phy@1 {&lt;BR /&gt; reg = &amp;lt;0x1&amp;gt;;&lt;BR /&gt; max-speed = &amp;lt;100&amp;gt;;&lt;BR /&gt;// interrupt-parent = &amp;lt;&amp;amp;gpio1&amp;gt;;&lt;BR /&gt;// interrupts = &amp;lt;25 IRQ_TYPE_EDGE_FALLING&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; };&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;kernel configuration:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;# ethernet mdio&lt;BR /&gt;CONFIG_FSL_ENETC=y&lt;BR /&gt;CONFIG_FSL_ENETC_MDIO=y&lt;BR /&gt;CONFIG_FSL_ENETC_VF=y&lt;BR /&gt;CONFIG_FSL_ENETC_PTP_CLOCK=y&lt;BR /&gt;FSL_ENETC_HW_TIMESTAMPING=y&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;# Ethernet Gigabit PHY TI&lt;BR /&gt;CONFIG_DP83867_PHY=y&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;# CONFIG_IPV6 is not set&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;# TSN switch&lt;BR /&gt;CONFIG_TSN=y&lt;BR /&gt;CONFIG_ENETC_TSN=y&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;# Microsemi PHY&lt;BR /&gt;CONFIG_NET_VENDOR_MICROSEMI=y&lt;BR /&gt;CONFIG_MICROSEMI_PHY=y&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;# Felix Switch&lt;BR /&gt;CONFIG_MSCC_OCELOT_SWITCH=y&lt;BR /&gt;CONFIG_MSCC_FELIX_SWITCH=y&lt;BR /&gt;CONFIG _MSCC_FELIX_SWITCH_TSN=y&lt;BR /&gt;CONFIG_MSCC_FELIX_SWITCH_PTP_CLOCK=y&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;is my devicetree and kernle configuations okay?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your help in advance&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;regards,&lt;/P&gt;&lt;P&gt;Uvi&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 16 Mar 2020 09:35:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1028-could-not-attach-to-PHY/m-p/1034484#M5772</guid>
      <dc:creator>yuvarajesh_vall</dc:creator>
      <dc:date>2020-03-16T09:35:07Z</dc:date>
    </item>
    <item>
      <title>Re: LS1028: could not attach to PHY</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1028-could-not-attach-to-PHY/m-p/1034485#M5773</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please provide:&lt;/P&gt;&lt;P&gt;1) connection schematics as searchable PDF&lt;/P&gt;&lt;P&gt;2) complete DTS&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 16 Mar 2020 11:29:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1028-could-not-attach-to-PHY/m-p/1034485#M5773</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2020-03-16T11:29:10Z</dc:date>
    </item>
    <item>
      <title>Re: LS1028: could not attach to PHY</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1028-could-not-attach-to-PHY/m-p/1034486#M5774</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Fedor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your reply.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1) I am not allowed to send the schematics. Our hardware developer tested again with the board(PHY connections). it seems good.&amp;nbsp;&lt;/P&gt;&lt;P&gt;2) Please find the dts file below:&lt;/P&gt;&lt;P&gt;/*&lt;BR /&gt; * Device Tree Include file for&amp;nbsp;Test&amp;nbsp;CPU Board&lt;BR /&gt; *&lt;BR /&gt; */&lt;/P&gt;&lt;P&gt;/dts-v1/;&lt;BR /&gt;#include &amp;lt;dt-bindings/gpio/gpio.h&amp;gt;&lt;BR /&gt;#include "fsl-ls1028a.dtsi"&lt;/P&gt;&lt;P&gt;/ {&lt;BR /&gt; model = "Test Board";&lt;BR /&gt; compatible = "fsl,ls1028a";&lt;/P&gt;&lt;P&gt;aliases {&lt;BR /&gt; /* TBD ethernet */&lt;BR /&gt; crypto = &amp;amp;crypto;&lt;BR /&gt; serial0 = &amp;amp;duart0;&lt;BR /&gt; serial1 = &amp;amp;duart1;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;chosen {&lt;BR /&gt; stdout-path = "serial0:115200n8";&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;memory@80000000 {&lt;BR /&gt; device_type = "memory";&lt;BR /&gt; reg = &amp;lt;0x0 0x80000000 0x1 0x0000000&amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;sys_mclk: clock-mclk {&lt;BR /&gt; compatible = "fixed-clock";&lt;BR /&gt; #clock-cells = &amp;lt;0&amp;gt;;&lt;BR /&gt; clock-frequency = &amp;lt;25000000&amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;reg_1p8v: regulator-1p8v {&lt;BR /&gt; compatible = "regulator-fixed";&lt;BR /&gt; regulator-name = "1P8V";&lt;BR /&gt; regulator-min-microvolt = &amp;lt;1800000&amp;gt;;&lt;BR /&gt; regulator-max-microvolt = &amp;lt;1800000&amp;gt;;&lt;BR /&gt; regulator-always-on;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;sb_3v3: regulator-sb3v3 {&lt;BR /&gt; compatible = "regulator-fixed";&lt;BR /&gt; regulator-name = "3v3_vbus";&lt;BR /&gt; regulator-min-microvolt = &amp;lt;3300000&amp;gt;;&lt;BR /&gt; regulator-max-microvolt = &amp;lt;3300000&amp;gt;;&lt;BR /&gt; regulator-boot-on;&lt;BR /&gt; regulator-always-on;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;/* Provide gpios from controllers as single gpio with correct label */&lt;BR /&gt; gpio_export {&lt;BR /&gt; compatible = "gpio-export";&lt;BR /&gt; &lt;BR /&gt; /************************** CPU GPIO-CONTROLLER *************************/&lt;BR /&gt; &lt;BR /&gt; /* GPIO1_22 =&amp;gt; GPIO122_I2C1_DEBUGx */&lt;BR /&gt; &lt;BR /&gt; gpio_122_i2c1_debug {&lt;BR /&gt; gpio-export,name = "gpio_122";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio1 22 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* GPIO1_23 =&amp;gt; GPIO123_I2C5_DEBUGx */&lt;BR /&gt; &lt;BR /&gt; gpio_123_i2c5_debug {&lt;BR /&gt; gpio-export,name = "gpio_123";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio1 23 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* GPIO1_26 =&amp;gt; GPIO126_JTAG_DEBUG10x */&lt;BR /&gt; &lt;BR /&gt; gpio_126_jtag_debug10 {&lt;BR /&gt; gpio-export,name = "gpio_126";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio1 26 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;/* GPIO1_27 =&amp;gt; GPIO127_JTAG_DEBUG11x */&lt;BR /&gt; &lt;BR /&gt; gpio_127_jtag_debug11 {&lt;BR /&gt; gpio-export,name = "gpio_127";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio1 27 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* GPIO1_30 =&amp;gt; GPIO130_CPU_RXx */&lt;BR /&gt; &lt;BR /&gt; gpio_130_cpu_rx {&lt;BR /&gt; gpio-export,name = "gpio_130";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio1 30 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;/* GPIO1_31 =&amp;gt; GPIO131_CPU_TXx */&lt;BR /&gt; &lt;BR /&gt; gpio_131_cpu_tx {&lt;BR /&gt; gpio-export,name = "gpio_131";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio1 31 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* GPIO2_06 =&amp;gt; GPIO206_JTAG_DEBUG20x */&lt;BR /&gt; &lt;BR /&gt; gpio_206_jtag_debug20 {&lt;BR /&gt; gpio-export,name = "gpio_206";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio2 06 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* GPIO2_07 =&amp;gt; GPIO207_JTAG_DEBUG21x */&lt;BR /&gt; &lt;BR /&gt; gpio_207_jtag_debug21 {&lt;BR /&gt; gpio-export,name = "gpio_207";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio2 07 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* GPIO2_28 =&amp;gt; GPIO228_SGMII_INTx */&lt;BR /&gt; &lt;BR /&gt; gpio_228_sgmii_int {&lt;BR /&gt; gpio-export,name = "gpio_228";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio2 28 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* GPIO2_29 =&amp;gt; GPIO229_RGMII_INTx */&lt;BR /&gt; &lt;BR /&gt; gpio_229_rgmii_int {&lt;BR /&gt; gpio-export,name = "gpio_229";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio2 29 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* GPIO2_30 =&amp;gt; GPIO230_QSGMII_INTx */&lt;BR /&gt; &lt;BR /&gt; gpio_230_qsgmii_int {&lt;BR /&gt; gpio-export,name = "gpio_230";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio2 30 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* GPIO2_31 =&amp;gt; GPIO231_CH_IDENTx */&lt;BR /&gt; &lt;BR /&gt; gpio_231_ch_ident {&lt;BR /&gt; gpio-export,name = "gpio_231";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio2 31 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* GPIO3_13 =&amp;gt; GPIO313_SC_MUXx */&lt;BR /&gt; &lt;BR /&gt; gpio_313_sc_mux {&lt;BR /&gt; gpio-export,name = "gpio_313";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio3 13 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* GPIO3_14 =&amp;gt; GPIO314_EXT_WD_TRIGx */&lt;BR /&gt; &lt;BR /&gt; gpio_314_ext_wd_trig {&lt;BR /&gt; gpio-export,name = "gpio_314";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio3 14 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* GPIO3_15 =&amp;gt; GPIO315_EXT_WD_DISx */&lt;BR /&gt; &lt;BR /&gt; gpio_315_ext_wd_dis {&lt;BR /&gt; gpio-export,name = "gpio_315";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio3 15 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* GPIO3_16 =&amp;gt; SECURE_BOOT_FAILUREx*/&lt;BR /&gt; &lt;BR /&gt; gpio_316_secure_boot_failure {&lt;BR /&gt; gpio-export,name = "gpio_316";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio3 16 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /****************************FIRST IO-EXPANDER ****************************/&lt;BR /&gt; &lt;BR /&gt; /* IO-EXPANDER P00 does not exist */&lt;BR /&gt; &lt;BR /&gt; /* IO-EXPANDER P01 does not exist */&lt;BR /&gt; &lt;BR /&gt; /* IO-EXPANDER P02 does not exist */&lt;BR /&gt; &lt;BR /&gt; /* IO-EXPANDER P03 does not exist */&lt;BR /&gt; &lt;BR /&gt; &lt;BR /&gt; /* IO-EXPANDER P04 =&amp;gt; PCIE_MINICARD_PWRENx */&lt;BR /&gt; &lt;BR /&gt; // pcie_minicard_pwr_en {&lt;BR /&gt; // gpio-export,name = "pcie_minicard_pwr_en";&lt;BR /&gt; // gpio-export,output = &amp;lt;1&amp;gt;; &lt;BR /&gt; // gpio-export,direction = "out";&lt;BR /&gt; // gpio-export,direction_may_change;&lt;BR /&gt; // gpios = &amp;lt;&amp;amp;io_expander0 4 GPIO_ACTIVE_LOW&amp;gt;;&lt;BR /&gt; // };&lt;BR /&gt; &lt;BR /&gt; /* IO-EXPANDER P05 =&amp;gt; SECURE_BOOT_FUSE_PROGx */&lt;BR /&gt; &lt;BR /&gt; secure_boot_fuse {&lt;BR /&gt; gpio-export,name = "secure_boot_fuse";&lt;BR /&gt; gpio-export,output = &amp;lt;0&amp;gt;; &lt;BR /&gt; gpio-export,direction = "out";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;io_expander0 5 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* IO-EXPANDER P06 =&amp;gt; PCIE_MINICARD_RESETx */&lt;BR /&gt; &lt;BR /&gt; // pcie_minicard_reset {&lt;BR /&gt; // gpio-export,name = "pcie_minicard_reset";&lt;BR /&gt; // gpio-export,output = &amp;lt;1&amp;gt;; &lt;BR /&gt; // gpio-export,direction = "out";&lt;BR /&gt; // gpio-export,direction_may_change;&lt;BR /&gt; // gpios = &amp;lt;&amp;amp;io_expander0 6 GPIO_ACTIVE_LOW&amp;gt;;&lt;BR /&gt; // };&lt;BR /&gt; &lt;BR /&gt; /* IO-EXPANDER P07 =&amp;gt; W_DISABLEx */&lt;BR /&gt; &lt;BR /&gt; w_disable {&lt;BR /&gt; gpio-export,name = "w_disable";&lt;BR /&gt; gpio-export,output = &amp;lt;1&amp;gt;; &lt;BR /&gt; gpio-export,direction = "out";&lt;BR /&gt; gpio-export,direction_may_change;&lt;BR /&gt; gpios = &amp;lt;&amp;amp;io_expander0 3 GPIO_ACTIVE_LOW&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /****************************SECOND IO-EXPANDER ****************************/&lt;BR /&gt; &lt;BR /&gt; /* IO-EXPANDER P00 =&amp;gt; GP_LEDx[0]_GREEN */&lt;BR /&gt; &lt;BR /&gt; gp_led0_green {&lt;BR /&gt; gpio-export,name = "gp_led0_green";&lt;BR /&gt; gpios = &amp;lt;&amp;amp;io_expander1 0 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; default-state = "off";&lt;BR /&gt; linux,default-trigger = "none";&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* IO-EXPANDER P01 =&amp;gt; GP_LEDx[0]_RED */&lt;BR /&gt; &lt;BR /&gt; gp_led0_red {&lt;BR /&gt; gpio-export,name = "gp_led0_red";&lt;BR /&gt; gpios = &amp;lt;&amp;amp;io_expander1 1 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; default-state = "off";&lt;BR /&gt; linux,default-trigger = "none";&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* IO-EXPANDER P02 =&amp;gt; GP_LEDx[1]_GREEN */&lt;BR /&gt; &lt;BR /&gt; gp_led1_green {&lt;BR /&gt; gpio-export,name = "gp_led1_green";&lt;BR /&gt; gpios = &amp;lt;&amp;amp;io_expander1 2 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; default-state = "off";&lt;BR /&gt; linux,default-trigger = "none";&lt;BR /&gt; }; &lt;BR /&gt; &lt;BR /&gt; /* IO-EXPANDER P03 =&amp;gt; GP_LEDx[1]_RED */&lt;BR /&gt; &lt;BR /&gt; gp_led1_red {&lt;BR /&gt; gpio-export,name = "gp_led1_red";&lt;BR /&gt; gpios = &amp;lt;&amp;amp;io_expander1 3 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; default-state = "off";&lt;BR /&gt; linux,default-trigger = "none";&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* IO-EXPANDER P04 =&amp;gt; GP_LEDx[2]_GREEN */&lt;BR /&gt; &lt;BR /&gt; gp_led2_green {&lt;BR /&gt; gpio-export,name = "gp_led2_green";&lt;BR /&gt; gpios = &amp;lt;&amp;amp;io_expander1 4 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; default-state = "off";&lt;BR /&gt; linux,default-trigger = "none";&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* IO-EXPANDER P05 =&amp;gt; GP_LEDx[2]_RED */&lt;BR /&gt; &lt;BR /&gt; gp_led2_red {&lt;BR /&gt; gpio-export,name = "gp_led2_red";&lt;BR /&gt; gpios = &amp;lt;&amp;amp;io_expander1 5 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; default-state = "off";&lt;BR /&gt; linux,default-trigger = "none";&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* IO-EXPANDER P06 =&amp;gt; GP_LEDx[2]_GREEN */&lt;BR /&gt; &lt;BR /&gt; gp_led3_green {&lt;BR /&gt; gpio-export,name = "gp_led3_green";&lt;BR /&gt; gpios = &amp;lt;&amp;amp;io_expander1 6 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; default-state = "off";&lt;BR /&gt; linux,default-trigger = "none";&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* IO-EXPANDER P07 =&amp;gt; GP_LEDx[2]_RED */&lt;BR /&gt; &lt;BR /&gt; gp_led3_red {&lt;BR /&gt; gpio-export,name = "gp_led3_red";&lt;BR /&gt; gpios = &amp;lt;&amp;amp;io_expander1 7 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; default-state = "off";&lt;BR /&gt; linux,default-trigger = "none";&lt;BR /&gt; };&lt;BR /&gt; };&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;/* Enable Debug UART1 */&lt;BR /&gt;&amp;amp;duart0 {&lt;BR /&gt; status = "okay";&lt;BR /&gt; current-speed = &amp;lt;115200&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;/* Enable Debug UART2 */&lt;BR /&gt;&amp;amp;duart1 {&lt;BR /&gt; status = "okay";&lt;BR /&gt; current-speed = &amp;lt;115200&amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;i2c0 {&lt;BR /&gt; status = "okay";&lt;BR /&gt; clock-frequency = &amp;lt;400000&amp;gt;;&lt;BR /&gt; enable-workaround;&lt;BR /&gt; &lt;BR /&gt; /* GPIO1-CONTROLLER GPIO1_22 =&amp;gt; GPIO122_I2C1_DEBUGx */&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio1 22 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt; &lt;BR /&gt; /* I2C I/O-Expander TCA6408A IC67 */&lt;BR /&gt; &lt;BR /&gt; io_expander0: tca6408@20 {&lt;BR /&gt; compatible = "ti,tca6408";&lt;BR /&gt; #address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt; #size-cells = &amp;lt;0&amp;gt;;&lt;BR /&gt; reg = &amp;lt;0x20&amp;gt;;&lt;BR /&gt; #gpio-cells = &amp;lt;2&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* I2C I/O-Expander TCA6408A IC193 */&lt;BR /&gt; &lt;BR /&gt; io_expander1: tca6408@21 {&lt;BR /&gt; compatible = "ti,tca6408";&lt;BR /&gt; #address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt; #size-cells = &amp;lt;0&amp;gt;;&lt;BR /&gt; reg = &amp;lt;0x21&amp;gt;;&lt;BR /&gt; #gpio-cells = &amp;lt;2&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* Temperature sensor TMP461 IC37 */&lt;BR /&gt; temp_sensor0: tmp461@48 {&lt;BR /&gt; compatible = "ti,tmp401";&lt;BR /&gt; reg = &amp;lt;0x48&amp;gt;;&lt;BR /&gt; #gpio-cells = &amp;lt;2&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* NXP RTC PCF85063ATT IC19 */&lt;BR /&gt; rtc0: nxp,pcf85063@51 {&lt;BR /&gt; compatible = "nxp,pcf85063";&lt;BR /&gt; reg = &amp;lt;0x51&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* SPD 2K EEPROM DDR4 IC21 */&lt;BR /&gt; ddr4_eeprom: eeprom@52 {&lt;BR /&gt; reg = &amp;lt;0x52&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; &lt;BR /&gt; /* Board Data 2K EEPROM ST-M24SR64 IC57 */&lt;BR /&gt; bd_eeprom: eeprom@56 {&lt;BR /&gt; reg = &amp;lt;0x56&amp;gt;;&lt;BR /&gt; }; &lt;BR /&gt; &lt;BR /&gt; /* PCIe Switch PI7C9X2G404SL IC64 */&lt;BR /&gt; // pcie: pcie-switch@6f {&lt;BR /&gt; /*TODO compatible = ""; */&lt;BR /&gt; // reg = &amp;lt;0x6f&amp;gt;;&lt;BR /&gt; // }; &lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;i2c4 {&lt;BR /&gt; status = "okay";&lt;BR /&gt; clock-frequency = &amp;lt;100000&amp;gt;;&lt;BR /&gt; enable-workaround;&lt;BR /&gt; &lt;BR /&gt; /* GPIO1-CONTROLLER GPIO1_23 =&amp;gt; GPIO123_I2C5_DEBUGx */&lt;BR /&gt; gpios = &amp;lt;&amp;amp;gpio1 23 GPIO_ACTIVE_HIGH&amp;gt;;&lt;/P&gt;&lt;P&gt;};&lt;BR /&gt;};&lt;BR /&gt; &lt;BR /&gt;/* USB1 (front USB) */&lt;BR /&gt;&amp;amp;usb0 {&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;/* USB2 (routed to USB HUB) */&lt;BR /&gt;&amp;amp;usb1 {&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;esdhc {&lt;BR /&gt; status = "okay";&lt;BR /&gt; sd-uhs-sdr104;&lt;BR /&gt; sd-uhs-sdr50;&lt;BR /&gt; sd-uhs-sdr25;&lt;BR /&gt; sd-uhs-sdr12;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;esdhc1 {&lt;BR /&gt; status = "okay";&lt;BR /&gt; cap-sd-highspeed;&lt;BR /&gt; cap-mmc-highspeed;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;#if 0&lt;BR /&gt;&amp;amp;fspi {&lt;BR /&gt; status = "okay";&lt;BR /&gt; w25q128fw: flash@0 {&lt;BR /&gt; compatible = "winbond,w25q128fw", "jedec,spi-nor";&lt;BR /&gt; #address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt; #size-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt; spi-max-frequency = &amp;lt;20000000&amp;gt;;&lt;BR /&gt; reg = &amp;lt;0&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt;};&lt;BR /&gt;#endif&lt;/P&gt;&lt;P&gt;&amp;amp;enetc_port0 {&lt;BR /&gt; phy-handle = &amp;lt;&amp;amp;sgmii_phy0&amp;gt;;&lt;BR /&gt; phy-connection-type = "sgmii";&lt;/P&gt;&lt;P&gt;mdio {&lt;BR /&gt; #address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt; #size-cells = &amp;lt;0&amp;gt;;&lt;BR /&gt; sgmii_phy0: ethernet-phy@2 {&lt;BR /&gt; reg = &amp;lt;0x2&amp;gt;;&lt;BR /&gt; max-speed = &amp;lt;1000&amp;gt;;&lt;BR /&gt;// interrupt-parent = &amp;lt;&amp;amp;gpio1&amp;gt;;&lt;BR /&gt;// interrupts = &amp;lt;25 IRQ_TYPE_EDGE_FALLING&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; };&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;enetc_port1 {&lt;BR /&gt; phy-handle = &amp;lt;&amp;amp;rgmii_phy0&amp;gt;;&lt;BR /&gt; phy-connection-type = "rgmii";&lt;BR /&gt; &lt;BR /&gt; mdio {&lt;BR /&gt; #address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt; #size-cells = &amp;lt;0&amp;gt;;&lt;BR /&gt; rgmii_phy0: ethernet-phy@1 {&lt;BR /&gt; reg = &amp;lt;0x1&amp;gt;;&lt;BR /&gt; max-speed = &amp;lt;100&amp;gt;;&lt;BR /&gt;// interrupt-parent = &amp;lt;&amp;amp;gpio1&amp;gt;;&lt;BR /&gt;// interrupts = &amp;lt;25 IRQ_TYPE_EDGE_FALLING&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt; };&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;enetc_mdio_pf3 {&lt;BR /&gt; qsgmii_phy1: ethernet-phy@4 {&lt;BR /&gt; reg = &amp;lt;0x10&amp;gt;;&lt;BR /&gt; max-speed = &amp;lt;100&amp;gt;;&lt;BR /&gt;// interrupt-parent = &amp;lt;&amp;amp;gpio1&amp;gt;;&lt;BR /&gt;// interrupts = &amp;lt;25 IRQ_TYPE_EDGE_FALLING&amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;qsgmii_phy2: ethernet-phy@5 {&lt;BR /&gt; reg = &amp;lt;0x11&amp;gt;;&lt;BR /&gt; max-speed = &amp;lt;100&amp;gt;;&lt;BR /&gt;// interrupt-parent = &amp;lt;&amp;amp;gpio1&amp;gt;;&lt;BR /&gt;// interrupts = &amp;lt;25 IRQ_TYPE_EDGE_FALLING&amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;qsgmii_phy3: ethernet-phy@6 {&lt;BR /&gt; reg = &amp;lt;0x12&amp;gt;;&lt;BR /&gt; max-speed = &amp;lt;1000&amp;gt;;&lt;BR /&gt;// interrupt-parent = &amp;lt;&amp;amp;gpio1&amp;gt;;&lt;BR /&gt;// interrupts = &amp;lt;25 IRQ_TYPE_EDGE_FALLING&amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;qsgmii_phy4: ethernet-phy@7 {&lt;BR /&gt; reg = &amp;lt;0x13&amp;gt;;&lt;BR /&gt; max-speed = &amp;lt;100&amp;gt;;&lt;BR /&gt;// interrupt-parent = &amp;lt;&amp;amp;gpio1&amp;gt;;&lt;BR /&gt;// interrupts = &amp;lt;25 IRQ_TYPE_EDGE_FALLING&amp;gt;;&lt;BR /&gt; };&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;/* l2switch ports */&lt;BR /&gt;&amp;amp;switch_port0 {&lt;BR /&gt; phy-handle = &amp;lt;&amp;amp;qsgmii_phy1&amp;gt;;&lt;BR /&gt; phy-connection-type = "qsgmii";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;switch_port1 {&lt;BR /&gt; phy-handle = &amp;lt;&amp;amp;qsgmii_phy2&amp;gt;;&lt;BR /&gt; phy-connection-type = "qsgmii";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;switch_port2 {&lt;BR /&gt; phy-handle = &amp;lt;&amp;amp;qsgmii_phy3&amp;gt;;&lt;BR /&gt; phy-connection-type = "qsgmii";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;switch_port3 {&lt;BR /&gt; phy-handle = &amp;lt;&amp;amp;qsgmii_phy4&amp;gt;;&lt;BR /&gt; phy-connection-type = "qsgmii";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;can0 {&lt;BR /&gt; status = "okay";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;can1 {&lt;BR /&gt; status = "okay";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;display0 {&lt;BR /&gt; status = "disabled";&lt;BR /&gt;};&lt;BR /&gt; &lt;BR /&gt;&amp;amp;sata {&lt;BR /&gt; status = "disabled";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you in advance&lt;/P&gt;&lt;P&gt;Uvi&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 17 Mar 2020 09:19:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1028-could-not-attach-to-PHY/m-p/1034486#M5774</guid>
      <dc:creator>yuvarajesh_vall</dc:creator>
      <dc:date>2020-03-17T09:19:07Z</dc:date>
    </item>
    <item>
      <title>Re: LS1028: could not attach to PHY</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1028-could-not-attach-to-PHY/m-p/1034487#M5775</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;It is always reasonable to provide files as attachments and not inline.&lt;/P&gt;&lt;P&gt;Provided DTS seems to be incomplete - it lacks at least one closing "}".&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please try to generate LSDK composite firmware as described in the Layerscape Software Development Kit User Guide.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 17 Mar 2020 10:01:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1028-could-not-attach-to-PHY/m-p/1034487#M5775</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2020-03-17T10:01:23Z</dc:date>
    </item>
    <item>
      <title>Re: LS1028: could not attach to PHY</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1028-could-not-attach-to-PHY/m-p/1034488#M5776</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Fedor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Sorry for dts file not attached. Please find the corrected and attached dts file.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 17 Mar 2020 10:20:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1028-could-not-attach-to-PHY/m-p/1034488#M5776</guid>
      <dc:creator>yuvarajesh_vall</dc:creator>
      <dc:date>2020-03-17T10:20:45Z</dc:date>
    </item>
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