Layerscape中的主题 Re: LS1046A IFC speed https://community.nxp.com/t5/Layerscape/LS1046A-IFC-speed/m-p/1020246#M5498 <HTML><HEAD></HEAD><BODY><P><SPAN class="">&nbsp;Yes, your calculations are correct.</SPAN></P><P><SPAN class=""></SPAN></P><P><SPAN class="">Regards,</SPAN></P><P><SPAN class="">Bulat</SPAN></P><P><SPAN class=""></SPAN></P></BODY></HTML> Tue, 31 Mar 2020 12:04:00 GMT Bulat 2020-03-31T12:04:00Z LS1046A IFC speed https://community.nxp.com/t5/Layerscape/LS1046A-IFC-speed/m-p/1020245#M5497 <HTML><HEAD></HEAD><BODY><P>Hello,</P><P>I have a very dumb question: We are designing a new board (core speed 1.8GHz) and need to connect the SoC to an FPGA via PCIe as well as via IFC (IFC for latency reasons for certain data transfers). As&nbsp;I understand it with the fastest possible platform clock frequency (700MHz) the fastest possible IFC clock speed is 87.5MHz (IFC_CCR divider = 4). If I choose the max. possible IFC frequency of 100MHz the max. possible platform clock frequency would be 400MHz only <SPAN>(IFC_CCR divider = 2)</SPAN>. Can this really be true?</P></BODY></HTML> Thu, 26 Mar 2020 08:10:35 GMT https://community.nxp.com/t5/Layerscape/LS1046A-IFC-speed/m-p/1020245#M5497 Quitsch 2020-03-26T08:10:35Z Re: LS1046A IFC speed https://community.nxp.com/t5/Layerscape/LS1046A-IFC-speed/m-p/1020246#M5498 <HTML><HEAD></HEAD><BODY><P><SPAN class="">&nbsp;Yes, your calculations are correct.</SPAN></P><P><SPAN class=""></SPAN></P><P><SPAN class="">Regards,</SPAN></P><P><SPAN class="">Bulat</SPAN></P><P><SPAN class=""></SPAN></P></BODY></HTML> Tue, 31 Mar 2020 12:04:00 GMT https://community.nxp.com/t5/Layerscape/LS1046A-IFC-speed/m-p/1020246#M5498 Bulat 2020-03-31T12:04:00Z