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    <title>Layerscape中的主题 Re: LS1021A pull-down on GPIO</title>
    <link>https://community.nxp.com/t5/Layerscape/LS1021A-pull-down-on-GPIO/m-p/947736#M4644</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you. We also noticed that pull-down through 75k+ ohm resistor doesn't set the pin to low.&amp;nbsp;Hence, we are expecting there is an internal pull-up on GPIO pins, with a value somewhere around 1M ohm. Is that correct? Could you give us an exact value of that pull-up?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 21 Aug 2019 07:25:43 GMT</pubDate>
    <dc:creator>amin_altabich</dc:creator>
    <dc:date>2019-08-21T07:25:43Z</dc:date>
    <item>
      <title>LS1021A pull-down on GPIO</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1021A-pull-down-on-GPIO/m-p/947734#M4642</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We would like to ensure low status on reset of GPIO1_16 on LS1021A which is initially open and stays high after the OS boot. Currently, the pin stays high on reset. The question is, can this pin be pulled down (33k ohm) to force low on reset? Manual says "When programmed as an output, no termination is required". What method would you suggest?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 21 Aug 2019 00:46:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1021A-pull-down-on-GPIO/m-p/947734#M4642</guid>
      <dc:creator>amin_altabich</dc:creator>
      <dc:date>2019-08-21T00:46:54Z</dc:date>
    </item>
    <item>
      <title>Re: LS1021A pull-down on GPIO</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1021A-pull-down-on-GPIO/m-p/947735#M4643</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;gt; The question is, can this pin be pulled down (33k ohm) to force low on reset?&lt;/P&gt;&lt;P&gt;Yes.&lt;/P&gt;&lt;P&gt;When PORESET_B is asserted GPIO signal is tri-stated.&lt;/P&gt;&lt;P&gt;After reset GPIO signal is configured as input.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 21 Aug 2019 05:07:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1021A-pull-down-on-GPIO/m-p/947735#M4643</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2019-08-21T05:07:27Z</dc:date>
    </item>
    <item>
      <title>Re: LS1021A pull-down on GPIO</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1021A-pull-down-on-GPIO/m-p/947736#M4644</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you. We also noticed that pull-down through 75k+ ohm resistor doesn't set the pin to low.&amp;nbsp;Hence, we are expecting there is an internal pull-up on GPIO pins, with a value somewhere around 1M ohm. Is that correct? Could you give us an exact value of that pull-up?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 21 Aug 2019 07:25:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1021A-pull-down-on-GPIO/m-p/947736#M4644</guid>
      <dc:creator>amin_altabich</dc:creator>
      <dc:date>2019-08-21T07:25:43Z</dc:date>
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