LayerscapeのトピックRe: LS1021A and PCIe

LS1021A and PCIe

artsiomstaliaro — Tue, 09 Jun 2015 06:23:58 GMT

Hello,

im working with PCIe from baremetal application where no MMU.

Is it possible access to PCIe memory (0x40_0000_0000) with qDMA? Is possible to read PCIe CFG with qDMA?

Maybe exist another way for reading data from this memory without MMU?

r8070z — Tue, 09 Jun 2015 16:46:24 GMT

Have a great day,

It is possible access to PCIe memory with qDMA but SMMU and translation windows should be configured properly.

artsiomstaliaro — Tue, 09 Jun 2015 17:18:46 GMT

Thank you for answer.

Memory translation is not possible with SMMU (errata)

What i can do: to configure ATU in PCIe and set correct SMMU S2CR configuration.

Can you describe more about SMMU configuration?

My current algorithm is:

1. Setup SMMU2 NSCR register, where clears "Client Port Disable" bit and clears "Memory Type Configuration" bit to set default memory attributes.

2. Setup SMMU2 SMR Stream ID number for PCIe

3. Setup SMMU2 S2CR register with Write&Read allocate, Bypass type, Cacheable memory attribute.

4. Setup PCIe1: setup link and configure iATU. (If MMU translation is enable, so I able to read PCIe WIFI card CFG0 data from mapped address).

5. Setup qDMA legacy channel in qDMA manager to copy 256 bytes from PCIe1 memory (0x4000000000) to DDR3 (0x80300000).

6. Check DLSR register in qDMA manager: DLSR_CB is set constantly. So copy cannot be completed.