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    <title>topic Re: LX2160ARDB - Composite Image with PCIe Gen4 in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/LX2160ARDB-Composite-Image-with-PCIe-Gen4/m-p/878014#M4047</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yiping,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your instruction. I was able to build the whole composite image and flash it into my board. I will follow your instruction for building RCW image only to save time when I need to change it.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Tuan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 25 Mar 2019 14:17:10 GMT</pubDate>
    <dc:creator>tnguyen2</dc:creator>
    <dc:date>2019-03-25T14:17:10Z</dc:date>
    <item>
      <title>LX2160ARDB - Composite Image with PCIe Gen4</title>
      <link>https://community.nxp.com/t5/Layerscape/LX2160ARDB-Composite-Image-with-PCIe-Gen4/m-p/878011#M4044</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello everyone,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you again for your help on my other issue the other day. Today I have another issue with the composite image / RCW firmware flashing.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My board originally does not have PCIe Gen4 enabled when it was shipped. There is a workaround to flash a customized RCW firmware (with&amp;nbsp;SRDS_DIV_PEX_S3 set to 0) to Dev#1 that a co-worker from the other site gave me that worked for me meaning I got PCIe Gen4 when booting with Dev#1.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I then used flexbuild from BSPv0.5 to build a composite image with&amp;nbsp;&lt;SPAN&gt;SRDS_DIV_PEX_S3 set to 0&lt;/SPAN&gt; and flash it on Dev#1 (I am still not able to get SD or USB to work.) The image boots great but the PCIe link is limited as Gen3. I checked the RCW file (rcw_2000_700_2900_19_5_2.rcw) carefully to make sure the workaround is there and the file is built when flex-builder combines the firmware to generate the image but I don't know why the content of the RCW when it boots is not what I expected.&amp;nbsp;Here is the RCW with my built composite image:&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;U-Boot 2018.09 (Feb 23 2019 - 22:52:29 +0000)&lt;/P&gt;&lt;P&gt;SoC: LX2160ACE Rev1.0 (0x87360010)&lt;BR /&gt;Clock Configuration:&lt;BR /&gt; CPU0(A72):2000 MHz CPU1(A72):2000 MHz CPU2(A72):2000 MHz&lt;BR /&gt; CPU3(A72):2000 MHz CPU4(A72):2000 MHz CPU5(A72):2000 MHz&lt;BR /&gt; CPU6(A72):2000 MHz CPU7(A72):2000 MHz CPU8(A72):2000 MHz&lt;BR /&gt; CPU9(A72):2000 MHz CPU10(A72):2000 MHz CPU11(A72):2000 MHz&lt;BR /&gt; CPU12(A72):2000 MHz CPU13(A72):2000 MHz CPU14(A72):2000 MHz&lt;BR /&gt; CPU15(A72):2000 MHz&lt;BR /&gt; Bus: 700 MHz DDR: 2900 MT/s&lt;BR /&gt;Reset Configuration Word (RCW):&lt;BR /&gt; 00000000: 50777738 1c500050 00000000 00000000&lt;BR /&gt; 00000010: 00000000 0c010000 00000000 00000000&lt;BR /&gt; 00000020: 016001a0 00002580 00000000 00000096&lt;BR /&gt; 00000030: 00000000 00000000 00000000 00000000&lt;BR /&gt; 00000040: 00000000 00000000 00000000 00000000&lt;BR /&gt; 00000050: 00000000 00000000 00000000 00000000&lt;BR /&gt; 00000060: 00000000 00000000 00027000 00000000&lt;BR /&gt; 00000070: 08b30010 001d0020&lt;BR /&gt;Model: NXP Layerscape LX2160ARDB Board&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;Here is what I expected (before I flashed my built composite image)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;SPAN style="font-family: Arial;"&gt;U-Boot 2017.07+fsl+g88d4384 (Nov 16 2018 - 00:29:41 +0000)&lt;BR /&gt; &lt;BR /&gt; SoC:&amp;nbsp; LX2160ACE Rev1.0 (0x87360010)&lt;BR /&gt; Clock Configuration:&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; CPU0(A72):2000 MHz&amp;nbsp; CPU1(A72):2000 MHz&amp;nbsp; CPU2(A72):2000 MHz&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; CPU3(A72):2000 MHz&amp;nbsp; CPU4(A72):2000 MHz&amp;nbsp; CPU5(A72):2000 MHz&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; CPU6(A72):2000 MHz&amp;nbsp; CPU7(A72):2000 MHz&amp;nbsp; CPU8(A72):2000 MHz&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; CPU9(A72):2000 MHz&amp;nbsp; CPU10(A72):2000 MHz&amp;nbsp; CPU11(A72):2000 MHz&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; CPU12(A72):2000 MHz&amp;nbsp; CPU13(A72):2000 MHz&amp;nbsp; CPU14(A72):2000 MHz&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; CPU15(A72):2000 MHz&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Bus:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 700&amp;nbsp; MHz&amp;nbsp; DDR:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2900 MT/s&lt;BR /&gt; Reset Configuration Word (RCW):&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 00000000: 50777738 1c500050 00000000 00000000&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 00000010: 00000000 0c010000 00000000 00000000&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 00000020: 020001a0 00002580 00000000 00000096&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 00000030: 00000000 00000000 00000000 00000000&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 00000040: 00000000 00000000 00000000 00000000&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 00000050: 00000000 00000000 00000000 00000000&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 00000060: 00000000 00000000 00027000 00000000&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 00000070: 08b30010 000d0022&lt;BR /&gt; Model: NXP Layerscape LX2160ARDB Board&lt;/SPAN&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial; "&gt;Since I don't have PCIe Gen4 with my built composite image, I tried to flash the customized RCW file I have from the co-worker to Dev#1 (already has my built composite image on it) but the result is that the board hangs immediately when the boot switches to Dev#1 (nothing printed out on the console.)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial; "&gt;I am trying to follow the process using yocto-sdk in the BSPv0.4 but it failed with my Ubuntu 18-04, Ubuntu 16-04 and Fedora 24 servers.&amp;nbsp;All failed with the following error and it seems like the source in the SDK is not valid anymore:&lt;/SPAN&gt;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;SPAN style="font-family: Arial;"&gt;ERROR: linux-qoriq-4.9-r0 do_fetch: Fetcher failure: Unable to find revision 4548b3d5cf3a0d9d7177e44005bfbb05f9530d2a in branch master even from upstream&lt;BR /&gt;ERROR: linux-qoriq-4.9-r0 do_fetch: Fetcher failure for URL: 'git://source.codeaurora.org/external/qoriq/qoriq-components/linux;nobranch=1'. Unable to fetch URL from any source.&lt;BR /&gt;ERROR: linux-qoriq-4.9-r0 do_fetch: Function failed: base_do_fetch&lt;BR /&gt;ERROR: Logfile of failure stored in: /home/tnguyen/yocto-sdk/build_lx2160ardb/tmp/work/lx2160ardb-fsl-linux/linux-qoriq/4.9-r0/temp/log.do_fetch.9624&lt;BR /&gt;ERROR: Task (/home/tnguyen/yocto-sdk/sources/meta-freescale/recipes-kernel/linux/linux-qoriq_4.9.bb:do_fetch) failed with exit code '1'&lt;/SPAN&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial; "&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial; "&gt;I really need PCIe Gen4 back to my board as soon as possible so please help on one of the items below (or all of them would be so wonderful)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial; "&gt;1. Show me how to get a composite image for the board with PCIe Gen4 enabled.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial; "&gt;2. Show me how to get the composite image what originally loaded and shipped with the board. The U-Boot version is:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #f6f6f6; font-family: Arial; "&gt;U-Boot 2017.07+fsl+g88d4384 (Nov 16 2018 - 00:29:41 +0000)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial; "&gt;I think I will be able to flash the customized RCW firmware to the board after restoring the factory composite firmware image.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial; "&gt;3. Show me how to get&amp;nbsp;a composite image built with BSPv0.4 so that I can give it a try.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial; "&gt;4. Show me how to extract the whole image firmware on Dev#0 and save to a file so that I will flash it to Dev#1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial; "&gt;5. How to enable PCIe Gen4 in RCW and build a composite image that includes the changes.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial; "&gt;I really appreciate your help.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: Arial; "&gt;Thanks&lt;BR /&gt;Tuan&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Mar 2019 23:31:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LX2160ARDB-Composite-Image-with-PCIe-Gen4/m-p/878011#M4044</guid>
      <dc:creator>tnguyen2</dc:creator>
      <dc:date>2019-03-07T23:31:53Z</dc:date>
    </item>
    <item>
      <title>Re: LX2160ARDB - Composite Image with PCIe Gen4</title>
      <link>https://community.nxp.com/t5/Layerscape/LX2160ARDB-Composite-Image-with-PCIe-Gen4/m-p/878012#M4045</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Update:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am able to build my composite image with PCIe Gen4 enabled after removing the obsolete images in build/firmware/ and rebuilding the ATF.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I appreciate your help so far. If you have something to share with me regarding my 5 questions, it would be great (though I&amp;nbsp;now have PCIe Gen4 back to my board, but not sure what else may obstructs me.)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;BR /&gt;Tuan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 Mar 2019 17:05:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LX2160ARDB-Composite-Image-with-PCIe-Gen4/m-p/878012#M4045</guid>
      <dc:creator>tnguyen2</dc:creator>
      <dc:date>2019-03-08T17:05:09Z</dc:date>
    </item>
    <item>
      <title>Re: LX2160ARDB - Composite Image with PCIe Gen4</title>
      <link>https://community.nxp.com/t5/Layerscape/LX2160ARDB-Composite-Image-with-PCIe-Gen4/m-p/878013#M4046</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello &lt;SPAN class=""&gt;Tuan Nguyen,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;I assume that you have LX2160 BSP 0.5 build environment.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;1. Please execute the following commands to get RCW source and build images.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;$ flex-builder -c rcw -m lx2160ardb&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;2. Please go to RCW source folder &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;flexbuild/packages/firmware/rcw/lx2160ardb/XGGFF_PP_HHHH_RR_19_5_2/&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;Please modify&amp;nbsp;SRDS_DIV_PEX_S3 as 0 in&amp;nbsp; rcw_2000_700_2900_19_5_2.rcw &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;3. Please go back to flexbuild folder to execute the following command again to regenerate RCW image&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;$ flex-builder -c rcw -m lx2160ardb&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;You could check RCW image in build/firmware/rcw/lx2160ardb/XGGFF_PP_HHHH_RR_19_5_2/rcw_2000_700_2900_19_5_2.bin with "xxd rcw_2000_700_2900_19_5_2.bin" command.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;4. Please regenerate the whole firmware image including the updated RCW or only program RCW image to FlexSPI DEV#1 at FlexSPI DEV#0, please refer to the following.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;$ sf probe 0:1&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;$ tftp 0xa0000000 rcw_2000_700_2900_19_5_2.bin&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;$ sf erase&amp;nbsp; 0 +$filesize&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;$ sf write 0xa0000000 0 $filesize&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt; Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 25 Mar 2019 03:14:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LX2160ARDB-Composite-Image-with-PCIe-Gen4/m-p/878013#M4046</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2019-03-25T03:14:06Z</dc:date>
    </item>
    <item>
      <title>Re: LX2160ARDB - Composite Image with PCIe Gen4</title>
      <link>https://community.nxp.com/t5/Layerscape/LX2160ARDB-Composite-Image-with-PCIe-Gen4/m-p/878014#M4047</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yiping,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your instruction. I was able to build the whole composite image and flash it into my board. I will follow your instruction for building RCW image only to save time when I need to change it.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Tuan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 25 Mar 2019 14:17:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LX2160ARDB-Composite-Image-with-PCIe-Gen4/m-p/878014#M4047</guid>
      <dc:creator>tnguyen2</dc:creator>
      <dc:date>2019-03-25T14:17:10Z</dc:date>
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