LayerscapeのトピックLS1046A RGMII 125MHz clock rising/falling time issue

LS1046A RGMII 125MHz clock rising/falling time issue

chenjacky — Wed, 19 Sep 2018 03:49:07 GMT

RGMII 125MHz(ECn_GTX_CLK125) clock rising/falling time are fail. We tried to remove LS1046A and add dummy load to measure timing that can meet spec. our design is 2.5V.

LS1046A RGMII AC timing specifications (LVDD = 2.5 /1.8 V)

Rise time (20%-80%) tRGTR — — 0.75 ns
Fall time (20%-80%) tRGTF — — 0.75 ns

Our measuement result:

Can we remove LS1046A to measure timing or do you have any comment?

Thanks.

2018/9/19

Re: LS1046A RGMII 125MHz clock rising/falling time issue

andrei_skok — Mon, 22 Oct 2018 11:18:58 GMT

The device has been tested with these specs and is guaranteed to work at these specs. So we strongly recommend to meet our HW specifications.

Generally the most real applications use CLK125 output from RGMII PHY as a source for ECx_CLK125 input of the processor (not external generator). This case for example PHY used in the LS1043ARDB board RTL8211 has exactly 0.75nS Rise/Fall time max. for this signal.

Clock drivers can be used for the CLK125 rather than oscillator part numbers.

Re: LS1046A RGMII 125MHz clock rising/falling time issue

chenjacky — Tue, 23 Oct 2018 10:25:59 GMT

Hi Andrei,

We have measured the NXP-LS1046ARDB that has same issue.

The LS1046ARDB is 1.8V RGMII, so Rising/Falling Time value exceeds 0.54 ns

To measureEC1_CLK125_OUT (from PHY RTL8211FS)

EC1_CLK125_OUT
Rising Time value is 740.40ps => Fail

Falling Time value is 662.89ps => Fail

do you have any comment?

Thanks.

2018/10/23