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    <title>topic Re: DDR Initialization in CodeWarrior example for LS1043A in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/DDR-Initialization-in-CodeWarrior-example-for-LS1043A/m-p/841896#M3795</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Thanks for your reply. I have not CWTAP for now. I built the code under ROM configuration and writen the binary file in vBank4 using u-boot.&amp;nbsp;&lt;/P&gt;&lt;P&gt;In rom_init.c we can see this function:&lt;/P&gt;&lt;P&gt;void mem_init_hook()&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* this method is called from runtime code for a ROM target */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* DDR initialization can be done here */&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;But nowhere actual DDR initialization, maybe this example is just usiing OCRAM...&lt;/P&gt;&lt;P&gt;Now my custom board is booting from QSPI but with errors. I will get back on the helloworld example later.&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 05 Jul 2018 08:05:36 GMT</pubDate>
    <dc:creator>j_wallace</dc:creator>
    <dc:date>2018-07-05T08:05:36Z</dc:date>
    <item>
      <title>DDR Initialization in CodeWarrior example for LS1043A</title>
      <link>https://community.nxp.com/t5/Layerscape/DDR-Initialization-in-CodeWarrior-example-for-LS1043A/m-p/841894#M3793</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello.&lt;/P&gt;&lt;P&gt;I run the CodeWarrior example named HelloWorld_C_Bare on LS1043ARDB and I am wondering how DDR is initialized.&lt;/P&gt;&lt;P&gt;I want to port the example to my custom board that should boot from a QSPI NOR flash. I think I have to modify the linker script with QSPI address where the software has been writen to: &lt;STRONG&gt;PROVIDE (___ROM_ADDRESS = 0x40100000); &lt;/STRONG&gt;(Same value as PBI command for QSPI boot pointer).&lt;STRONG&gt;&lt;BR /&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;But for now my question is How DDR in initialized in the HelloWorld example?&lt;/P&gt;&lt;P&gt;Best Regard.&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Jul 2018 07:25:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/DDR-Initialization-in-CodeWarrior-example-for-LS1043A/m-p/841894#M3793</guid>
      <dc:creator>j_wallace</dc:creator>
      <dc:date>2018-07-03T07:25:33Z</dc:date>
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      <title>Re: DDR Initialization in CodeWarrior example for LS1043A</title>
      <link>https://community.nxp.com/t5/Layerscape/DDR-Initialization-in-CodeWarrior-example-for-LS1043A/m-p/841895#M3794</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello &lt;A _jive_internal="true" data-content-finding="Community" data-userid="302721" data-username="j_wallace" href="https://community.nxp.com/people/j_wallace"&gt;j_wallace&lt;/A&gt;,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DDR controller initialization has been done in CodeWarrior initialization file, please open Target Init File panel from Run-&amp;gt;Debug Configuration-&amp;gt;GDB hardware Debugging-&amp;gt;&amp;lt;project name&amp;gt;-&amp;gt;Debugger-&amp;gt;Configure target connection, right click LS1043A_RDB to duplicate it as LS1043A_RDB(1), double click LS1043A_RDB(1) and click Target Init File panel. Please refer to "DDR Initialization" section in the CW initialization file.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Users need to customize DDR controller initialization section according to their custom boards. QCVS(DDRv) tool is recommended to use to calculate and optimize DDR controller configuration parameters.&lt;/P&gt;&lt;P&gt;Please refer to QCVS DDRv user manual from &lt;A class="link-titled" href="https://www.nxp.com/docs/en/user-guide/QCVS_DDR_User_Guide.pdf" title="https://www.nxp.com/docs/en/user-guide/QCVS_DDR_User_Guide.pdf"&gt;https://www.nxp.com/docs/en/user-guide/QCVS_DDR_User_Guide.pdf&lt;/A&gt; .&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 04 Jul 2018 07:45:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/DDR-Initialization-in-CodeWarrior-example-for-LS1043A/m-p/841895#M3794</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2018-07-04T07:45:23Z</dc:date>
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    <item>
      <title>Re: DDR Initialization in CodeWarrior example for LS1043A</title>
      <link>https://community.nxp.com/t5/Layerscape/DDR-Initialization-in-CodeWarrior-example-for-LS1043A/m-p/841896#M3795</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Thanks for your reply. I have not CWTAP for now. I built the code under ROM configuration and writen the binary file in vBank4 using u-boot.&amp;nbsp;&lt;/P&gt;&lt;P&gt;In rom_init.c we can see this function:&lt;/P&gt;&lt;P&gt;void mem_init_hook()&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* this method is called from runtime code for a ROM target */&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* DDR initialization can be done here */&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;But nowhere actual DDR initialization, maybe this example is just usiing OCRAM...&lt;/P&gt;&lt;P&gt;Now my custom board is booting from QSPI but with errors. I will get back on the helloworld example later.&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 Jul 2018 08:05:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/DDR-Initialization-in-CodeWarrior-example-for-LS1043A/m-p/841896#M3795</guid>
      <dc:creator>j_wallace</dc:creator>
      <dc:date>2018-07-05T08:05:36Z</dc:date>
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