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    <title>topic Re: LS1043ardb pbi related documents in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/LS1043ardb-pbi-related-documents/m-p/685795#M2686</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you request my problem.&lt;/P&gt;&lt;P&gt;I want to know PBI configure all &amp;nbsp;hardware resource.&lt;/P&gt;&lt;P&gt;I study&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;ls1043ardb_pbi.cfg file.I don't find&amp;nbsp;0x&lt;STRONG&gt;1&lt;/STRONG&gt;&lt;STRONG style="border: 0px; font-weight: bold;"&gt;&lt;EM style="border: 0px; font-weight: inherit;"&gt;6100c0 &amp;nbsp;0x1&lt;STRONG style="background-color: #ffffff; border: 0px;"&gt;570178 &amp;nbsp;&lt;/STRONG&gt;&lt;/EM&gt;&lt;/STRONG&gt;&lt;EM style="border: 0px; font-weight: inherit;"&gt;register&amp;nbsp;&lt;/EM&gt;&lt;EM style="border: 0px; font-weight: inherit;"&gt;declaration in&amp;nbsp;&lt;SPAN style="background-color: #ffffff;"&gt;LS1043A Reference Manual.&lt;/SPAN&gt;&lt;/EM&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 19 May 2017 08:03:25 GMT</pubDate>
    <dc:creator>zhoujianyun19</dc:creator>
    <dc:date>2017-05-19T08:03:25Z</dc:date>
    <item>
      <title>LS1043ardb pbi related documents</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1043ardb-pbi-related-documents/m-p/685793#M2684</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I debugging LS1043ardb development board .U-boot have&amp;nbsp;ls1043ardb_pbi.cfg file ,Details are as follows:&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;EM&gt;#Configure Scratch register&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;09570600 00000000&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;09570604 10000000&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;#Alt base register&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;09570158 00001000&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;#Disable CCI barrier tranaction&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;09570178 0000e010&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;09180000 00000008&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;#USB PHY frequency sel&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;09570418 0000009e&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;0957041c 0000009e&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;09570420 0000009e&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;#flush PBI data&lt;/EM&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;EM&gt;096100c0 000fffff&lt;/EM&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;EM&gt;&amp;nbsp;&lt;/EM&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Please help provide PBI related documents.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 May 2017 03:50:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1043ardb-pbi-related-documents/m-p/685793#M2684</guid>
      <dc:creator>zhoujianyun19</dc:creator>
      <dc:date>2017-05-19T03:50:02Z</dc:date>
    </item>
    <item>
      <title>Re: LS1043ardb pbi related documents</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1043ardb-pbi-related-documents/m-p/685794#M2685</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;General description of the PBI commands is provided in the QorIQ LS1043A Reference Manual, Chapter 27 Pre-Boot Loader (PBL).&lt;/P&gt;&lt;P&gt;Please note that default PBL base address offset is 0x100_0000 and this offset is concatenated with 24-bit SYS_ADDR of a PBI command.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Decoding example:&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;EM&gt;09570600 00000000&lt;/EM&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;ACS=0&lt;/P&gt;&lt;P&gt;BYTE_CNT=000100 (4 bytes)&lt;/P&gt;&lt;P&gt;CNT=1&lt;/P&gt;&lt;P&gt;SYS_ADDR=570600&lt;/P&gt;&lt;P&gt;Complete CCSR address with offset: 0x1570600 (SCFG_SCRATCHRW0)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 May 2017 05:09:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1043ardb-pbi-related-documents/m-p/685794#M2685</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2017-05-19T05:09:34Z</dc:date>
    </item>
    <item>
      <title>Re: LS1043ardb pbi related documents</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1043ardb-pbi-related-documents/m-p/685795#M2686</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you request my problem.&lt;/P&gt;&lt;P&gt;I want to know PBI configure all &amp;nbsp;hardware resource.&lt;/P&gt;&lt;P&gt;I study&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;ls1043ardb_pbi.cfg file.I don't find&amp;nbsp;0x&lt;STRONG&gt;1&lt;/STRONG&gt;&lt;STRONG style="border: 0px; font-weight: bold;"&gt;&lt;EM style="border: 0px; font-weight: inherit;"&gt;6100c0 &amp;nbsp;0x1&lt;STRONG style="background-color: #ffffff; border: 0px;"&gt;570178 &amp;nbsp;&lt;/STRONG&gt;&lt;/EM&gt;&lt;/STRONG&gt;&lt;EM style="border: 0px; font-weight: inherit;"&gt;register&amp;nbsp;&lt;/EM&gt;&lt;EM style="border: 0px; font-weight: inherit;"&gt;declaration in&amp;nbsp;&lt;SPAN style="background-color: #ffffff;"&gt;LS1043A Reference Manual.&lt;/SPAN&gt;&lt;/EM&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 May 2017 08:03:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1043ardb-pbi-related-documents/m-p/685795#M2686</guid>
      <dc:creator>zhoujianyun19</dc:creator>
      <dc:date>2017-05-19T08:03:25Z</dc:date>
    </item>
    <item>
      <title>Re: LS1043ardb pbi related documents</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1043ardb-pbi-related-documents/m-p/685796#M2687</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;16100c0 - refer to the LS1043A RM, Table 27-5. Description of PBL commands, Wait&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;1570178 - hidden CCI CONFIG register (additional information can be obtained by creating a Technical Case - refer to the &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fcommunity.freescale.com%2Fthread%2F381898" rel="nofollow" target="_blank"&gt;https://community.freescale.com/thread/381898&lt;/A&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 May 2017 08:22:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1043ardb-pbi-related-documents/m-p/685796#M2687</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2017-05-19T08:22:45Z</dc:date>
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