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    <title>topic Re: Using the eTSEC on a LS1020A processor, I notice that my buffer descriptors need to be little endian. in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/Using-the-eTSEC-on-a-LS1020A-processor-I-notice-that-my-buffer/m-p/675969#M2569</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You can control endienness through&amp;nbsp;SCFG_ETSECDMAMCR register. You can try changing this register and check!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 28 Jun 2017 04:27:53 GMT</pubDate>
    <dc:creator>swanandpurankar</dc:creator>
    <dc:date>2017-06-28T04:27:53Z</dc:date>
    <item>
      <title>Using the eTSEC on a LS1020A processor, I notice that my buffer descriptors need to be little endian.</title>
      <link>https://community.nxp.com/t5/Layerscape/Using-the-eTSEC-on-a-LS1020A-processor-I-notice-that-my-buffer/m-p/675968#M2568</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am trying to get the eTSEC running on a LS1020A processor.&amp;nbsp; I am using u-boot as a reference along with the LS1020A user manual.&amp;nbsp; In u-boot the buffer descriptors are handled as big-endian which makes sense since the eTSEC is big-endian. However when I mimic u-boot, I receive and transmit nothing.&amp;nbsp; In fact I see my RMON counter called RDRP increase.&amp;nbsp; The IEVENTG0 register reports this is due to a busy condition.&amp;nbsp; So out of desperation, I removed the 16 bit endian swap. I started to receive and transmit. In addition, I needed to remove the 32 bit endian swap for the bufPtr in the buffer descriptors. When I look at the data being received by the eTSEC, the data looks 64 bit endian swapped. Very strange.&lt;/P&gt;&lt;P&gt;I looked at the u-boot code and the user manual.&amp;nbsp; I cannot find any initialization&amp;nbsp;that would fix this.&amp;nbsp; Does anyone have any suggestions.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Ray Haas&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 27 Jun 2017 17:40:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Using-the-eTSEC-on-a-LS1020A-processor-I-notice-that-my-buffer/m-p/675968#M2568</guid>
      <dc:creator>raymondhaas</dc:creator>
      <dc:date>2017-06-27T17:40:59Z</dc:date>
    </item>
    <item>
      <title>Re: Using the eTSEC on a LS1020A processor, I notice that my buffer descriptors need to be little endian.</title>
      <link>https://community.nxp.com/t5/Layerscape/Using-the-eTSEC-on-a-LS1020A-processor-I-notice-that-my-buffer/m-p/675969#M2569</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You can control endienness through&amp;nbsp;SCFG_ETSECDMAMCR register. You can try changing this register and check!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 28 Jun 2017 04:27:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Using-the-eTSEC-on-a-LS1020A-processor-I-notice-that-my-buffer/m-p/675969#M2569</guid>
      <dc:creator>swanandpurankar</dc:creator>
      <dc:date>2017-06-28T04:27:53Z</dc:date>
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