topic Re: Twin die DDR3L interface with LS1012 in Layerscape

Twin die DDR3L interface with LS1012

alpeshmandani — Thu, 01 Jun 2017 09:47:46 GMT

Hello

I have question regarding DDR3L memory interface on LS1012 processor

I'm designing a custom board which will have DDR3L memory and density 2GByte as well two Die or two chipsets (1GByte).

I've explored datasheet of LS1012 and found only one CS, one CKE, and one ODT pins are available.

Please let me know how to interface 2GByte DDR3L memory with LS1012 and which signals are required to the configuration of two two chip or dual die.

Thank you.

Regars,

Alpesh

Re: Twin die DDR3L interface with LS1012

Bulat — Thu, 01 Jun 2017 11:38:29 GMT

The only way to get 2GB of memory is to use two 8Gb x8 DDR3L devices to form 16-bit DDR bus. These can be for example MT41K1G8 devices from Micron. Both devices should be connected to the same address, command, clock CS, MCKE and ODT signals. Data group signals should be connected individually to the devices in point-to-point way, one byte lane to one device, second byte lane to the other device.

Regards,

Bulat

Re: Twin die DDR3L interface with LS1012

alpeshmandani — Thu, 01 Jun 2017 13:53:48 GMT

Hi Bulat,

Thanks for your providing answer.

I will design schematic as per above suggestion and send back to you for review.

Thank.

Regards,

Alpesh

Re: Twin die DDR3L interface with LS1012

alpeshmandani — Tue, 06 Jun 2017 04:59:17 GMT

Hi Bulat,

I am considering to connect two individual 8Gb/4Gb X 8 bit memory from a 16bit bus width of the processor to expand up to 2Gbyte.

Please let me know which Routing Topologies ( Fly- By Topology or T-Topology) are best for the DDR3L memory interface.

Thanks.

Regards,

Alpesh Mandani