Layerscape中的主题 Re: [LS1043ARDB] Cores boot at different exception levels

[LS1043ARDB] Cores boot at different exception levels

zalbassam — Tue, 20 Jun 2017 14:44:11 GMT

Hi,

Iam having a problem with one of the LS1043ARDB board (Orange box), after U-boot loads my program, core0 is at exception level 2 (EL2), but the other cores boot at EL1 and get hang when trying to switch to EL2. I have another LS1043ARDB board (Gray box) and all the cores boot at EL2. the same uboot image is on both boards: "U-Boot 2016.012.0+ga9b437f (May 15 2016 - 11:01:10 +0800)", and both boards have the same dip switch settings. I have however noticed the below differences in the uboot boot log:

The orange box (not working):

CPLD: V1.4

PPA Firmware: Version 0.1

EEPROM: NXID v1

The gray box (working):

CPLD: V1.5

PPA Firmware: Version 0.2

EEPROM: Invalid ID (0b 0c 03 04)

Any idea why the orange box has the cores boot at different EL? Should the color of the box mean something (like secure)?

Thanks,

Re: [LS1043ARDB] Cores boot at different exception levels

yipingwang — Mon, 26 Jun 2017 09:20:59 GMT

Hello Zaid Albassam,

The problem should be caused by PPA firmware not compatible with U-BOOT 2016.012.

Please flash the attached ppa image on the problem board.

PPA address on NOR flash of LS1043.

bank 0:0x60500000

bank 4: 0x64500000

Have a great day,
TIC

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Re: [LS1043ARDB] Cores boot at different exception levels

zalbassam — Mon, 26 Jun 2017 14:55:01 GMT

Hi yipingwang‌,

My board now shows that the PPA version is upped to v0.2, and with that my problem is resolved.

I wished that U-boot could detect these incompatibility with the PPA and at least print a warning in the boot log, It could have saved me couple of days of investigations.

Anyways, thanks for the help.

Zaid