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    <title>topic Re: Synchronous Abort Exception when booting u-boot from eMMC in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/Synchronous-Abort-Exception-when-booting-u-boot-from-eMMC/m-p/660183#M2381</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;It looks like your SPL is not finding a valid u-boot image for the second part of the boot. &amp;nbsp;Are you sure you are using an image that combines RXW+PBL+SPL+uboot?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I just solved a very similar&amp;nbsp;"Synchronous Abort" at about the same location yesterday - almost certainly not caused by the same problem, though. &amp;nbsp;In my case when I dumped the uboot image (&lt;SPAN style="font-family: 'courier new', courier, monospace;"&gt;od -tx1&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN class=""&gt;&lt;SPAN style="font-family: 'courier new', courier, monospace;"&gt;u-boot-with-spl-pbl.bin&lt;/SPAN&gt;), I noticed some suspicious gaps in the image when compared to a working image on the reference board. &amp;nbsp;In my case the problem was caused by a modification I had made to the `mkimage` tool; once I back out that change I was back in business.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 04 Jan 2017 22:49:18 GMT</pubDate>
    <dc:creator>cswarth</dc:creator>
    <dc:date>2017-01-04T22:49:18Z</dc:date>
    <item>
      <title>Synchronous Abort Exception when booting u-boot from eMMC</title>
      <link>https://community.nxp.com/t5/Layerscape/Synchronous-Abort-Exception-when-booting-u-boot-from-eMMC/m-p/660182#M2380</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We designed a board similar as LS1043ARDB. The main difference between our board and&amp;nbsp;&lt;SPAN&gt;LS1043ARDB is that our board use 4 MT40A1G8 DDR4 chips while LS1043ARDB use 4 MT40A512M8 DDR4 chips. And on our board, there's no nand flash &amp;amp; nor flash mounted. We want to boot from eMMC (similar as SD card on LS1043RDB).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;We built a u-boot-sdcard image on SDK 2.0. This image booted up successfully on LS1043ARDB, but it failed on our board, error print is as following:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;U-Boot SPL 2016.012.0+ga9b437f (Jan 04 2017 - 20:45:24)&lt;/P&gt;&lt;P&gt;Initializing DDR....&lt;BR /&gt;starting at step 1 (STEP_GET_SPD)&lt;BR /&gt;Filling dimm parameters from board specific file&lt;BR /&gt;Computing lowest common DIMM parameters for memctl=0&lt;BR /&gt;lowest_common_spd_caslat is 0xb&lt;BR /&gt;Warning: not all DIMMs ECC capable, cant enable ECC&lt;BR /&gt;tCKmin_ps = 938&lt;BR /&gt;trcd_ps = 13500&lt;BR /&gt;trp_ps = 13500&lt;BR /&gt;tras_ps = 33000&lt;BR /&gt;trfc1_ps = 260000&lt;BR /&gt;trfc2_ps = 160000&lt;BR /&gt;trfc4_ps = 110000&lt;BR /&gt;trrds_ps = 3700&lt;BR /&gt;trrdl_ps = 5300&lt;BR /&gt;tccdl_ps = 5355&lt;BR /&gt;twr_ps = 15000&lt;BR /&gt;trc_ps = 46500&lt;BR /&gt;Reloading memory controller configuration options for memctl=0&lt;BR /&gt;mclk_ps = 1250 ps&lt;BR /&gt;Found timing match: n_ranks 1, data rate 1666, rank_gb 0&lt;BR /&gt;0 of 1 controllers are interleaving.&lt;BR /&gt;Checking interleaving options completed&lt;BR /&gt;dbw_cap_adj[0]=0&lt;BR /&gt;ctrl 0 dimm 0 base 0x0&lt;BR /&gt;ctrl 0 total 0x80000000&lt;BR /&gt;Total mem by __step_assign_addresses is 0x80000000&lt;BR /&gt;Total mem 2147483648 assigned&lt;BR /&gt;Programming controller 0&lt;BR /&gt;total 2 GB&lt;BR /&gt;Need to wait up to 132 * 10ms&lt;BR /&gt;total_memory by __fsl_ddr_sdram = 2147483648&lt;BR /&gt;&amp;gt;&amp;gt;spl:board_init_r()&lt;BR /&gt;using memory 0x820a0000-0x821a0000 for malloc()&lt;BR /&gt;spl_init()&lt;BR /&gt;Trying to boot from MMC&lt;BR /&gt;After announce_boot_device, calling spl_load_image...&lt;BR /&gt;Calling spl_mmc_load_image&lt;BR /&gt;spl: spl_mmc_load_image, calling spl_mmc_find_device&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;"Synchronous Abort" handler, esr 0x96000000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;ELR: 1000768c&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;LR: 100026fc&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;x0 : 0000000000000000 x1 : 0000000080102d78&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;x2 : ff000000ff001014 x3 : 0000000000000001&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;x4 : 000000001001d630 x5 : ffffff80ffffffc8&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;x6 : 0000000000000000 x7 : 000000000000000f&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;x8 : 0000000000000000 x9 : 0000000000000080&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;x10: 0000000000000003 x11: 0000000000000000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;x12: 0000000000000000 x13: 0000000000000000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;x14: 00000000100181e8 x15: 0000000000000001&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;x16: 0000000000000000 x17: 0000000000000000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;x18: 000000001001ddf0 x19: 0000000000000000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;x20: 0000000000000000 x21: 000000001001b000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;x22: 00000000deadbeef x23: 0000000000000001&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;x24: 0000000000000000 x25: 0000000010014000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;x26: 000000001001bd78 x27: 0000000000000001&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #ff0000;"&gt;x28: 0000000000000000 x29: 000000001001d940&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;We have tested the DDR function under CodeWarrior, it seems to be OK.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000;"&gt;Any suggestion will be appreciated.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 04 Jan 2017 14:00:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Synchronous-Abort-Exception-when-booting-u-boot-from-eMMC/m-p/660182#M2380</guid>
      <dc:creator>juddwang</dc:creator>
      <dc:date>2017-01-04T14:00:11Z</dc:date>
    </item>
    <item>
      <title>Re: Synchronous Abort Exception when booting u-boot from eMMC</title>
      <link>https://community.nxp.com/t5/Layerscape/Synchronous-Abort-Exception-when-booting-u-boot-from-eMMC/m-p/660183#M2381</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;It looks like your SPL is not finding a valid u-boot image for the second part of the boot. &amp;nbsp;Are you sure you are using an image that combines RXW+PBL+SPL+uboot?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I just solved a very similar&amp;nbsp;"Synchronous Abort" at about the same location yesterday - almost certainly not caused by the same problem, though. &amp;nbsp;In my case when I dumped the uboot image (&lt;SPAN style="font-family: 'courier new', courier, monospace;"&gt;od -tx1&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN class=""&gt;&lt;SPAN style="font-family: 'courier new', courier, monospace;"&gt;u-boot-with-spl-pbl.bin&lt;/SPAN&gt;), I noticed some suspicious gaps in the image when compared to a working image on the reference board. &amp;nbsp;In my case the problem was caused by a modification I had made to the `mkimage` tool; once I back out that change I was back in business.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 04 Jan 2017 22:49:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Synchronous-Abort-Exception-when-booting-u-boot-from-eMMC/m-p/660183#M2381</guid>
      <dc:creator>cswarth</dc:creator>
      <dc:date>2017-01-04T22:49:18Z</dc:date>
    </item>
    <item>
      <title>Re: Synchronous Abort Exception when booting u-boot from eMMC</title>
      <link>https://community.nxp.com/t5/Layerscape/Synchronous-Abort-Exception-when-booting-u-boot-from-eMMC/m-p/660184#M2382</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi chris,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your reply. We are using the same u-boot-sdcard.bin image on our board and LS1043ARDB. And we are sure this image contains&amp;nbsp;RCW+PBL+SPL_Uboot. So the root cause of our problem maybe not the same as yours.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Is there any difference between eMMC (used on our board) and SD card (used on LS1043ARDB)?&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 Jan 2017 02:27:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Synchronous-Abort-Exception-when-booting-u-boot-from-eMMC/m-p/660184#M2382</guid>
      <dc:creator>juddwang</dc:creator>
      <dc:date>2017-01-05T02:27:36Z</dc:date>
    </item>
    <item>
      <title>Re: Synchronous Abort Exception when booting u-boot from eMMC</title>
      <link>https://community.nxp.com/t5/Layerscape/Synchronous-Abort-Exception-when-booting-u-boot-from-eMMC/m-p/660185#M2383</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Sorry, I haven't enough experience to answer your question re: difference between eMMC and sdcard. &amp;nbsp; Someplace I ran across the documentation of why the RCW on the sdcard has to start at offset 0x1000. &amp;nbsp;There is also a memory map for QSPI that lays out exactly where RCW, U-BOOT, FMAN microcode needs to go. &amp;nbsp;I haven't seen a similar&amp;nbsp;map&amp;nbsp;for eMMC.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 Jan 2017 17:47:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Synchronous-Abort-Exception-when-booting-u-boot-from-eMMC/m-p/660185#M2383</guid>
      <dc:creator>cswarth</dc:creator>
      <dc:date>2017-01-05T17:47:30Z</dc:date>
    </item>
    <item>
      <title>Re: Synchronous Abort Exception when booting u-boot from eMMC</title>
      <link>https://community.nxp.com/t5/Layerscape/Synchronous-Abort-Exception-when-booting-u-boot-from-eMMC/m-p/660186#M2384</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi chris,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We have solved the&amp;nbsp;problem, it's caused by DDR. The default DDR parameters of LS1043ARDB doesn't fit for our board.&lt;/P&gt;&lt;P&gt;Thank you all the same.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 06 Jan 2017 01:41:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Synchronous-Abort-Exception-when-booting-u-boot-from-eMMC/m-p/660186#M2384</guid>
      <dc:creator>juddwang</dc:creator>
      <dc:date>2017-01-06T01:41:46Z</dc:date>
    </item>
    <item>
      <title>Re: Synchronous Abort Exception when booting u-boot from eMMC</title>
      <link>https://community.nxp.com/t5/Layerscape/Synchronous-Abort-Exception-when-booting-u-boot-from-eMMC/m-p/660187#M2385</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Judd, please provide the parameters you used for the MT40A512M8 and the files you touched/updated?&amp;nbsp; Other customer's are seeing similar issues with the part and this would help customers in general since this is a common part.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Mar 2017 03:50:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Synchronous-Abort-Exception-when-booting-u-boot-from-eMMC/m-p/660187#M2385</guid>
      <dc:creator>tracysmith</dc:creator>
      <dc:date>2017-03-30T03:50:59Z</dc:date>
    </item>
    <item>
      <title>Re: Synchronous Abort Exception when booting u-boot from eMMC</title>
      <link>https://community.nxp.com/t5/Layerscape/Synchronous-Abort-Exception-when-booting-u-boot-from-eMMC/m-p/660188#M2386</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Tracy, sorry for late reply. We get the parameters from Codewarrior default settings for LS1043ARDB. And the main&amp;nbsp;changing is to downgrade DDR data rate from 1600 to 1300.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 12 Aug 2017 07:16:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Synchronous-Abort-Exception-when-booting-u-boot-from-eMMC/m-p/660188#M2386</guid>
      <dc:creator>juddwang</dc:creator>
      <dc:date>2017-08-12T07:16:19Z</dc:date>
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