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    <title>Layerscapeのトピックls1043 usb 3.0 controller in host mode</title>
    <link>https://community.nxp.com/t5/Layerscape/ls1043-usb-3-0-controller-in-host-mode/m-p/646406#M2169</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello *,&lt;BR /&gt;I try to configure USB 3.0 controller on an ls1043ardb. I use a stack that already working&lt;/P&gt;&lt;P&gt;on x86 real and virtual targets. On these architecture xHCI controller is accessed through PCI.&lt;/P&gt;&lt;P&gt;I try to port this stack on arm-v8 architecture.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Documentation (QorIQ LS1043A Reference Manual, Rev. 2, 11/2016)&lt;BR /&gt;seems pretty poor concerning initialization of DWC3 register set.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There is something in "35.4.6.1.4.1 Initializing global registers" but it doesn't describe&lt;BR /&gt;the process and values to be set in registers for host mode.&lt;/P&gt;&lt;P&gt;Except u-boot driver or linux kernel driver there is no explanation about&lt;BR /&gt;how this controller works..&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For the moment, when a device in plugged in USB1 connector linked to USB1 controller&lt;/P&gt;&lt;P&gt;PORTSC_PR bit is written in PORTSC register and an IRQ is received with bits&lt;/P&gt;&lt;P&gt;USBSTS_PCD and USBSTS_EINT set in USBSTS register.&lt;/P&gt;&lt;P&gt;Moreover IP bit is set in IMAN[0] (0 for interrupter 0). So every seems all right except.. event ring.&lt;/P&gt;&lt;P&gt;The problem comes from *event ring* that creates *no* event.. xHCI controller&lt;/P&gt;&lt;P&gt;is supposed to generate a "Port Status Change Event TRB" (See xHCI specification revision 1.1&lt;/P&gt;&lt;P&gt;chapter 6.4.2.3)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you know where I can find a documentation that explains how to configure&lt;BR /&gt;the USB 3.0 controller as *host only* properly?&lt;/P&gt;&lt;P&gt;I don't find something relevant in OTG chapter.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 26 Jan 2017 09:15:43 GMT</pubDate>
    <dc:creator>jjp</dc:creator>
    <dc:date>2017-01-26T09:15:43Z</dc:date>
    <item>
      <title>ls1043 usb 3.0 controller in host mode</title>
      <link>https://community.nxp.com/t5/Layerscape/ls1043-usb-3-0-controller-in-host-mode/m-p/646406#M2169</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello *,&lt;BR /&gt;I try to configure USB 3.0 controller on an ls1043ardb. I use a stack that already working&lt;/P&gt;&lt;P&gt;on x86 real and virtual targets. On these architecture xHCI controller is accessed through PCI.&lt;/P&gt;&lt;P&gt;I try to port this stack on arm-v8 architecture.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Documentation (QorIQ LS1043A Reference Manual, Rev. 2, 11/2016)&lt;BR /&gt;seems pretty poor concerning initialization of DWC3 register set.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There is something in "35.4.6.1.4.1 Initializing global registers" but it doesn't describe&lt;BR /&gt;the process and values to be set in registers for host mode.&lt;/P&gt;&lt;P&gt;Except u-boot driver or linux kernel driver there is no explanation about&lt;BR /&gt;how this controller works..&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For the moment, when a device in plugged in USB1 connector linked to USB1 controller&lt;/P&gt;&lt;P&gt;PORTSC_PR bit is written in PORTSC register and an IRQ is received with bits&lt;/P&gt;&lt;P&gt;USBSTS_PCD and USBSTS_EINT set in USBSTS register.&lt;/P&gt;&lt;P&gt;Moreover IP bit is set in IMAN[0] (0 for interrupter 0). So every seems all right except.. event ring.&lt;/P&gt;&lt;P&gt;The problem comes from *event ring* that creates *no* event.. xHCI controller&lt;/P&gt;&lt;P&gt;is supposed to generate a "Port Status Change Event TRB" (See xHCI specification revision 1.1&lt;/P&gt;&lt;P&gt;chapter 6.4.2.3)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you know where I can find a documentation that explains how to configure&lt;BR /&gt;the USB 3.0 controller as *host only* properly?&lt;/P&gt;&lt;P&gt;I don't find something relevant in OTG chapter.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 26 Jan 2017 09:15:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/ls1043-usb-3-0-controller-in-host-mode/m-p/646406#M2169</guid>
      <dc:creator>jjp</dc:creator>
      <dc:date>2017-01-26T09:15:43Z</dc:date>
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