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  <channel>
    <title>LayerscapeのトピックRe: PCIe endpoint on LX2160ardb</title>
    <link>https://community.nxp.com/t5/Layerscape/PCIe-endpoint-on-LX2160ardb/m-p/2189489#M16224</link>
    <description>&lt;P&gt;&lt;SPAN&gt;Please refer to the following u-boot patch for LS1028ARDB, you need to add related code in u-boot.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;nxa13285@lsv07330:/opt/samba/nxa13285/flexbuild/flexbuild/components/firmware/rcw$ git diff&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;diff --git a/ls1028ardb/R_SQPP_0x85bb/rcw_1500_gpu600.rcw b/ls1028ardb/R_SQPP_0x85bb/rcw_1500_gpu600.rcw&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;index 057b0f1..2e4fa7d 100644&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;--- a/ls1028ardb/R_SQPP_0x85bb/rcw_1500_gpu600.rcw&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+++ b/ls1028ardb/R_SQPP_0x85bb/rcw_1500_gpu600.rcw&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;@@ -38,6 +38,7 @@ SRDS_PRTCL_S1_L0=8&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;SRDS_PRTCL_S1_L1=5&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;SRDS_PRTCL_S1_L2=11&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;SRDS_PRTCL_S1_L3=11&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+HOST_AGT_PEX2=1&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Errata for PCIe controller */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;#include &amp;lt;../ls1028asi/a008851.rcw&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;nxa13285@lsv07330:/opt/samba/nxa13285/flexbuild/flexbuild/components/firmware/rcw$&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;nxa13285@lsv07330:/opt/samba/nxa13285/flexbuild/flexbuild/components/firmware/uboot$ git diff&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;index 7234faea0e..bda9035ea0 100644&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;--- a/arch/arm/dts/fsl-ls1028a.dtsi&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+++ b/arch/arm/dts/fsl-ls1028a.dtsi&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;@@ -123,6 +123,17 @@&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000&amp;gt;; /* non-prefetchable memory */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;+&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ pcie_ep2: pcie_ep@3500000 {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ compatible = "fsl,ls-pcie-ep";&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ reg = &amp;lt;0x00 0x03500000 0x0 0x80000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ 0x00 0x035c0000 0x0 0x40000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ 0x88 0x00000000 0x8 0x00000000&amp;gt;;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ reg-names = "regs", "ctrl", "addr_space";&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ num-ib-windows = &amp;lt;6&amp;gt;;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ num-ob-windows = &amp;lt;8&amp;gt;;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ };&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;crypto: crypto@8000000 {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;fsl,sec-era = &amp;lt;10&amp;gt;;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;index 87357d30c0..0afbc815c1 100644&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;--- a/configs/ls1028ardb_tfa_defconfig&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+++ b/configs/ls1028ardb_tfa_defconfig&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;@@ -94,3 +94,4 @@ CONFIG_OF_LIBFDT_OVERLAY=y&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;CONFIG_EFI_LOADER_BOUNCE_BUFFER=y&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;CONFIG_VIDEO=y&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;CONFIG_VIDEO_LS_HDP_LOAD=y&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+CONFIG_PCIE_LAYERSCAPE_EP=y&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Tue, 21 Oct 2025 02:18:24 GMT</pubDate>
    <dc:creator>yipingwang</dc:creator>
    <dc:date>2025-10-21T02:18:24Z</dc:date>
    <item>
      <title>PCIe endpoint on LX2160ardb</title>
      <link>https://community.nxp.com/t5/Layerscape/PCIe-endpoint-on-LX2160ardb/m-p/2184609#M16197</link>
      <description>&lt;P&gt;I am trying to set PCIe as endpoint on LX2160ardb_rev2 with lsdk 21.08. I have set&amp;nbsp;HOST_AGT_PEX3=1 as stated in User Guide. But after that I can't see PCIe3 neither u-boot nor linux console. What have I missed?&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ggrocer_0-1760339883324.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/360414iC67A2AE5D2A3A069/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ggrocer_0-1760339883324.png" alt="ggrocer_0-1760339883324.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 13 Oct 2025 07:20:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/PCIe-endpoint-on-LX2160ardb/m-p/2184609#M16197</guid>
      <dc:creator>ggrocer</dc:creator>
      <dc:date>2025-10-13T07:20:06Z</dc:date>
    </item>
    <item>
      <title>Re: PCIe endpoint on LX2160ardb</title>
      <link>https://community.nxp.com/t5/Layerscape/PCIe-endpoint-on-LX2160ardb/m-p/2189489#M16224</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Please refer to the following u-boot patch for LS1028ARDB, you need to add related code in u-boot.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;nxa13285@lsv07330:/opt/samba/nxa13285/flexbuild/flexbuild/components/firmware/rcw$ git diff&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;diff --git a/ls1028ardb/R_SQPP_0x85bb/rcw_1500_gpu600.rcw b/ls1028ardb/R_SQPP_0x85bb/rcw_1500_gpu600.rcw&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;index 057b0f1..2e4fa7d 100644&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;--- a/ls1028ardb/R_SQPP_0x85bb/rcw_1500_gpu600.rcw&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+++ b/ls1028ardb/R_SQPP_0x85bb/rcw_1500_gpu600.rcw&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;@@ -38,6 +38,7 @@ SRDS_PRTCL_S1_L0=8&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;SRDS_PRTCL_S1_L1=5&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;SRDS_PRTCL_S1_L2=11&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;SRDS_PRTCL_S1_L3=11&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+HOST_AGT_PEX2=1&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Errata for PCIe controller */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;#include &amp;lt;../ls1028asi/a008851.rcw&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;nxa13285@lsv07330:/opt/samba/nxa13285/flexbuild/flexbuild/components/firmware/rcw$&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;nxa13285@lsv07330:/opt/samba/nxa13285/flexbuild/flexbuild/components/firmware/uboot$ git diff&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;index 7234faea0e..bda9035ea0 100644&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;--- a/arch/arm/dts/fsl-ls1028a.dtsi&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+++ b/arch/arm/dts/fsl-ls1028a.dtsi&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;@@ -123,6 +123,17 @@&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000&amp;gt;; /* non-prefetchable memory */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;+&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ pcie_ep2: pcie_ep@3500000 {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ compatible = "fsl,ls-pcie-ep";&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ reg = &amp;lt;0x00 0x03500000 0x0 0x80000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ 0x00 0x035c0000 0x0 0x40000&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ 0x88 0x00000000 0x8 0x00000000&amp;gt;;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ reg-names = "regs", "ctrl", "addr_space";&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ num-ib-windows = &amp;lt;6&amp;gt;;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ num-ob-windows = &amp;lt;8&amp;gt;;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+ };&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;crypto: crypto@8000000 {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;fsl,sec-era = &amp;lt;10&amp;gt;;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;index 87357d30c0..0afbc815c1 100644&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;--- a/configs/ls1028ardb_tfa_defconfig&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+++ b/configs/ls1028ardb_tfa_defconfig&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;@@ -94,3 +94,4 @@ CONFIG_OF_LIBFDT_OVERLAY=y&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;CONFIG_EFI_LOADER_BOUNCE_BUFFER=y&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;CONFIG_VIDEO=y&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;CONFIG_VIDEO_LS_HDP_LOAD=y&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;+CONFIG_PCIE_LAYERSCAPE_EP=y&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 21 Oct 2025 02:18:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/PCIe-endpoint-on-LX2160ardb/m-p/2189489#M16224</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2025-10-21T02:18:24Z</dc:date>
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