<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: LS1046A QSPI boot issue re: address bytes in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/LS1046A-QSPI-boot-issue-re-address-bytes/m-p/2137892#M15917</link>
    <description>&lt;P&gt;&lt;BR /&gt;&lt;SPAN&gt;The customer can refer Table 27-23 (reset sequence) under 27.6.3.4 Look-up Table section. It shows the default values of the LUT that is being programmed and transmitted by LS1046A. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;It is not possible for the LS1046A to access the QSPI flash on boot using 4-byte addressing as during boot LS1046A boot ROM only supports 3-byte addressing.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Therefore customer is required to use QSPI memory that supports 3-byte addressing by default (or can boot in that mode).&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Tue, 22 Jul 2025 03:12:01 GMT</pubDate>
    <dc:creator>yipingwang</dc:creator>
    <dc:date>2025-07-22T03:12:01Z</dc:date>
    <item>
      <title>LS1046A QSPI boot issue re: address bytes</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046A-QSPI-boot-issue-re-address-bytes/m-p/2129603#M15878</link>
      <description>&lt;P&gt;Hi I am having an issue booting from qspi. Our current custom board uses an Avalanche Tech QSPI MRAM for boot memory. Currently it seems like there might be a mismatch between the number of address bytes, as the Avalanche MRAM states that it only accepts a read command with 32-bit addresses (4 bytes) but I can't find any information on what the LS1046A transmits.&amp;nbsp;&lt;/P&gt;&lt;P&gt;From forum posts it seems like other product lines that boot over QSPI only transmit 3-byte addresses.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Is it possible for the LS1046A to access the QSPI flash on boot using 4-byte addressing? Is there any good information on the physical interface on boot?&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;</description>
      <pubDate>Mon, 07 Jul 2025 23:02:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046A-QSPI-boot-issue-re-address-bytes/m-p/2129603#M15878</guid>
      <dc:creator>ismk-1003123</dc:creator>
      <dc:date>2025-07-07T23:02:02Z</dc:date>
    </item>
    <item>
      <title>Re: LS1046A QSPI boot issue re: address bytes</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1046A-QSPI-boot-issue-re-address-bytes/m-p/2137892#M15917</link>
      <description>&lt;P&gt;&lt;BR /&gt;&lt;SPAN&gt;The customer can refer Table 27-23 (reset sequence) under 27.6.3.4 Look-up Table section. It shows the default values of the LUT that is being programmed and transmitted by LS1046A. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;It is not possible for the LS1046A to access the QSPI flash on boot using 4-byte addressing as during boot LS1046A boot ROM only supports 3-byte addressing.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Therefore customer is required to use QSPI memory that supports 3-byte addressing by default (or can boot in that mode).&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 22 Jul 2025 03:12:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1046A-QSPI-boot-issue-re-address-bytes/m-p/2137892#M15917</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2025-07-22T03:12:01Z</dc:date>
    </item>
  </channel>
</rss>

