LS1088A Pin Configuration for eMMC

zeroqruel — Tue, 20 May 2025 14:22:59 GMT

Hello,

I want to run 8 bus witdh eMMC on custom LS1088 based board. I have successfully activated emmc, but it is inited as 4 bus width every time. According to what I see in the datasheet and reference design, I need to configure the pins that are SPI by default in the OVDD section as SDHC_DAT4-7 in the HS Mux. I tried to do this on the DTS side but I am getting a syntax error.

&esdhc { status = "okay"; compatible = "fsl,ls1088a-esdhc", "fsl,esdhc"; non-removable; bus-width = <8>; clock-frequency = <200000000>; pinctrl-names = "default"; pinctrl-0 = <&esdhc_pins>; }; &fsl_lsiodev { esdhc_pins: esdhc-pins { fsl,pins = < LS1088A_SIGNAL(PAD_P3, SDHC_CLK, 0x06000049) /* SDHC_CLK */ LS1088A_SIGNAL(PAD_P2, SDHC_CMD, 0x06000049) /* SDHC_CMD */ LS1088A_SIGNAL(PAD_P1, SDHC_DATA0, 0x06000049) /* SDHC_DATA0 */ LS1088A_SIGNAL(PAD_R2, SDHC_DATA1, 0x06000049) /* SDHC_DATA1 */ LS1088A_SIGNAL(PAD_R1, SDHC_DATA2, 0x06000049) /* SDHC_DATA2 */ LS1088A_SIGNAL(PAD_T1, SDHC_DATA3, 0x06000049) /* SDHC_DATA3 */ LS1088A_SIGNAL(PAD_U1, SDHC_DATA4, 0x06000049) /* SDHC_DATA4 */ LS1088A_SIGNAL(PAD_R3, SDHC_DATA5, 0x06000049) /* SDHC_DATA5 */ LS1088A_SIGNAL(PAD_T3, SDHC_DATA6, 0x06000049) /* SDHC_DATA6 */ LS1088A_SIGNAL(PAD_V1, SDHC_DATA7, 0x06000049) /* SDHC_DATA7 */ >; }; };

What are the steps I should follow to configure it correctly?

mmc0: switch to bus width 8 failed

Is QCVS PinMuxing Tool the right and sufficient solution for me to solve this problem?

Re: LS1088A Pin Configuration for eMMC

zeroqruel — Fri, 23 May 2025 05:10:08 GMT

I solved the problem. In the RCW file, it was necessary to activate the function for emmc from the SPI_PCS pin settings.

SPI_PCS_BASE=2

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LS1088A Pin Configuration for eMMC

Re: LS1088A Pin Configuration for eMMC