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    <title>LayerscapeのトピックRe: Cannot write data at address 0x80000000</title>
    <link>https://community.nxp.com/t5/Layerscape/Cannot-write-data-at-address-0x80000000/m-p/2064438#M15522</link>
    <description>&lt;P&gt;1. First for new DDR bringing up on the a custom board, we suggest the customer use QCVS DDRv tool to do validation and optimization to get the optimized parameters to use them in atf source code.&lt;/P&gt;
&lt;P&gt;For QCVS DDRv tool usage, you could refer to the following document.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.nxp.com.cn%2Fdocs%2Fen%2Fuser-guide%2FQCVS_DDR_User_Guide.pdf&amp;amp;data=05%7C02%7Cyiping.wang%40nxp.com%7Cf536ea0308f541a4f38b08dd6690d6cb%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C638779494445588693%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&amp;amp;sdata=uIdmB55v1YnMVpmfwKUbCefxCfHpxC2ZW7xJWQ006Hg%3D&amp;amp;reserved=0" target="_blank"&gt;https://www.nxp.com.cn/docs/en/user-guide/QCVS_DDR_User_Guide.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fcommunity.nxp.com%2Ft5%2FQonverge-Knowledge-Base%2FDDR-Controller-Configuration-on-LS2085-LS2080-Bringing-up%2Fta-p%2F1128310&amp;amp;data=05%7C02%7Cyiping.wang%40nxp.com%7Cf536ea0308f541a4f38b08dd6690d6cb%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C638779494445619046%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&amp;amp;sdata=JTgpHiSbup3g0cFKhzmEHk0dBEiACcPEpDY9rHp1IGs%3D&amp;amp;reserved=0" target="_blank"&gt;https://community.nxp.com/t5/Qonverge-Knowledge-Base/DDR-Controller-Configuration-on-LS2085-LS2080-Bringing-up/ta-p/1128310&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;You could use "read from SPD" method to create a QCVS DDR project, then connect to your custom board to do validation to get the optimized parameters and build to generate code&amp;nbsp;ddr_init.c&amp;nbsp; and use it in ATF source code.&lt;/P&gt;
&lt;P&gt;2. Modify atf source code according to your custom board.&lt;/P&gt;
&lt;P&gt;Go back to folder flexbuild_lsdk2108_github, and run the following command to get atf source code.&lt;/P&gt;
&lt;P&gt;$ flex-builder -c atf -m ls1046ardb -b qspi&lt;/P&gt;
&lt;P&gt;Go to atf source code folder components/firmware/atf/, please modify ddr controller initialization file plat/nxp/soc-ls1046a/ls1046ardb/ddr_init.c according to your custom board.&lt;/P&gt;
&lt;P&gt;Rebuild atf with the following command.&lt;/P&gt;
&lt;P&gt;$ flex-builder -c atf -m ls1046ardb -b qspi&lt;/P&gt;
&lt;P&gt;You will get atf images bl2_qspi.pbl and fip_uboot.bin in folder flexbuild_lsdk2108_github/build/firmware/atf/ls1046ardb/.&lt;/P&gt;
&lt;P&gt;Please deploy&amp;nbsp;bl2_qspi.pbl at 0 and&amp;nbsp;fip_uboot.bin at 0x100000 at QSPI flash.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Wed, 19 Mar 2025 07:34:32 GMT</pubDate>
    <dc:creator>yipingwang</dc:creator>
    <dc:date>2025-03-19T07:34:32Z</dc:date>
    <item>
      <title>Cannot write data at address 0x80000000</title>
      <link>https://community.nxp.com/t5/Layerscape/Cannot-write-data-at-address-0x80000000/m-p/2063339#M15516</link>
      <description>&lt;P&gt;&lt;SPAN&gt;I am confirming the startup of a custom board using the LS1046A. I created the PBL on&amp;nbsp;&lt;/SPAN&gt;&lt;A href="https://github.com/nxp-qoriq/atf.git" target="_blank"&gt;https://github.com/nxp-qoriq/atf.git&lt;/A&gt;&lt;SPAN&gt;&amp;nbsp;to enable booting in QSPI mode. However, when executed, the console message stops at "NOTICE: BL2: Built: [date and time]."&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Following advice, I used the QCVS DDR tool to access the DDR, but both read and write failed. Additionally, when I ran [Diagnose Connection] in the [Target Connections] tab, an error was output in the [Test DDR memory access] section: "Cannot write data at address 0x80000000." &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;What areas need to be modified on&amp;nbsp;&lt;/SPAN&gt;&lt;A href="https://github.com/nxp-qoriq/atf.git" target="_blank"&gt;https://github.com/nxp-qoriq/atf.git&lt;/A&gt;&lt;SPAN&gt;&amp;nbsp;to initialize the DDR for my custom board? Currently, I am creating a PBL based on the LS1046ARDB.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thanks.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 18 Mar 2025 02:34:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Cannot-write-data-at-address-0x80000000/m-p/2063339#M15516</guid>
      <dc:creator>Johnson_s</dc:creator>
      <dc:date>2025-03-18T02:34:28Z</dc:date>
    </item>
    <item>
      <title>Re: Cannot write data at address 0x80000000</title>
      <link>https://community.nxp.com/t5/Layerscape/Cannot-write-data-at-address-0x80000000/m-p/2064438#M15522</link>
      <description>&lt;P&gt;1. First for new DDR bringing up on the a custom board, we suggest the customer use QCVS DDRv tool to do validation and optimization to get the optimized parameters to use them in atf source code.&lt;/P&gt;
&lt;P&gt;For QCVS DDRv tool usage, you could refer to the following document.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.nxp.com.cn%2Fdocs%2Fen%2Fuser-guide%2FQCVS_DDR_User_Guide.pdf&amp;amp;data=05%7C02%7Cyiping.wang%40nxp.com%7Cf536ea0308f541a4f38b08dd6690d6cb%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C638779494445588693%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&amp;amp;sdata=uIdmB55v1YnMVpmfwKUbCefxCfHpxC2ZW7xJWQ006Hg%3D&amp;amp;reserved=0" target="_blank"&gt;https://www.nxp.com.cn/docs/en/user-guide/QCVS_DDR_User_Guide.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fcommunity.nxp.com%2Ft5%2FQonverge-Knowledge-Base%2FDDR-Controller-Configuration-on-LS2085-LS2080-Bringing-up%2Fta-p%2F1128310&amp;amp;data=05%7C02%7Cyiping.wang%40nxp.com%7Cf536ea0308f541a4f38b08dd6690d6cb%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C638779494445619046%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&amp;amp;sdata=JTgpHiSbup3g0cFKhzmEHk0dBEiACcPEpDY9rHp1IGs%3D&amp;amp;reserved=0" target="_blank"&gt;https://community.nxp.com/t5/Qonverge-Knowledge-Base/DDR-Controller-Configuration-on-LS2085-LS2080-Bringing-up/ta-p/1128310&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;You could use "read from SPD" method to create a QCVS DDR project, then connect to your custom board to do validation to get the optimized parameters and build to generate code&amp;nbsp;ddr_init.c&amp;nbsp; and use it in ATF source code.&lt;/P&gt;
&lt;P&gt;2. Modify atf source code according to your custom board.&lt;/P&gt;
&lt;P&gt;Go back to folder flexbuild_lsdk2108_github, and run the following command to get atf source code.&lt;/P&gt;
&lt;P&gt;$ flex-builder -c atf -m ls1046ardb -b qspi&lt;/P&gt;
&lt;P&gt;Go to atf source code folder components/firmware/atf/, please modify ddr controller initialization file plat/nxp/soc-ls1046a/ls1046ardb/ddr_init.c according to your custom board.&lt;/P&gt;
&lt;P&gt;Rebuild atf with the following command.&lt;/P&gt;
&lt;P&gt;$ flex-builder -c atf -m ls1046ardb -b qspi&lt;/P&gt;
&lt;P&gt;You will get atf images bl2_qspi.pbl and fip_uboot.bin in folder flexbuild_lsdk2108_github/build/firmware/atf/ls1046ardb/.&lt;/P&gt;
&lt;P&gt;Please deploy&amp;nbsp;bl2_qspi.pbl at 0 and&amp;nbsp;fip_uboot.bin at 0x100000 at QSPI flash.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 19 Mar 2025 07:34:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Cannot-write-data-at-address-0x80000000/m-p/2064438#M15522</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2025-03-19T07:34:32Z</dc:date>
    </item>
    <item>
      <title>Re: Cannot write data at address 0x80000000</title>
      <link>https://community.nxp.com/t5/Layerscape/Cannot-write-data-at-address-0x80000000/m-p/2068133#M15540</link>
      <description>&lt;P&gt;Thanks to you, the DDR initialization was successful. However, the third step was also necessary, so I will note it down.&lt;/P&gt;&lt;P&gt;3.In the ATF code, the erratum A09803 sets "ddr_out: address=0x1080114, value=0x401160", but in the DDRv tool-generated DDR initialization file, it was described as CCSR_BE_M(0x01080114, 0x00401150 | 0x00000020). Therefore, by modifying ddr_init.c to write 0x401170 to 0x114, it worked successfully.&lt;/P&gt;&lt;P&gt;Is this a bug?&lt;/P&gt;</description>
      <pubDate>Tue, 25 Mar 2025 23:55:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Cannot-write-data-at-address-0x80000000/m-p/2068133#M15540</guid>
      <dc:creator>Johnson_s</dc:creator>
      <dc:date>2025-03-25T23:55:44Z</dc:date>
    </item>
    <item>
      <title>Re: Cannot write data at address 0x80000000</title>
      <link>https://community.nxp.com/t5/Layerscape/Cannot-write-data-at-address-0x80000000/m-p/2070767#M15550</link>
      <description>&lt;P&gt;Yes, please use the parameters provided in DDRv tool.&lt;/P&gt;</description>
      <pubDate>Mon, 31 Mar 2025 03:44:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/Cannot-write-data-at-address-0x80000000/m-p/2070767#M15550</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2025-03-31T03:44:39Z</dc:date>
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