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    <title>topic Re: PBI not applied in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/PBI-not-applied/m-p/2044524#M15400</link>
    <description>&lt;P&gt;I was indeed suspecting that something overwrites it:) Finally I found it, in the board configuration there was:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;out_be32(&amp;amp;scfg-&amp;gt;rcwpmuxcr0, 0x3300);&lt;/LI-CODE&gt;&lt;P&gt;After removing it, no one overwrites my stuff:)&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for the hint!&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 14 Feb 2025 11:49:49 GMT</pubDate>
    <dc:creator>mykytah</dc:creator>
    <dc:date>2025-02-14T11:49:49Z</dc:date>
    <item>
      <title>PBI not applied</title>
      <link>https://community.nxp.com/t5/Layerscape/PBI-not-applied/m-p/2042779#M15386</link>
      <description>&lt;P&gt;Hello everyone,&lt;/P&gt;&lt;P&gt;I am currently trying to use USB2_EN, USB2_PWRFAULT, USB3_EN, USB3_PWRFAULT pins on LS1046 as GPIOs. To do this, I am trying to use the following PBI command:&lt;/P&gt;&lt;P&gt;write 0x0057040c,0x00001111&lt;/P&gt;&lt;P&gt;However, it does not seem to be applied, as when reading the from uboot, I get:&lt;/P&gt;&lt;P&gt;=&amp;gt; md.l 0x0157040c&lt;BR /&gt;0157040c: 00330000 00000000 29000000 9e000000 ..3........)....&lt;/P&gt;&lt;P&gt;I have confirmed that manually overwriting it in uboot makes the GPIO work, so now I am wondering, why my PBI commands are not applied (also some other registers seem to be different).&amp;nbsp;&lt;/P&gt;&lt;P&gt;What is the best way to debug this? The generated binary (see attached) seems to be including the commands.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you in advance!&lt;/P&gt;&lt;P&gt;Mykyta&lt;/P&gt;</description>
      <pubDate>Wed, 12 Feb 2025 17:54:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/PBI-not-applied/m-p/2042779#M15386</guid>
      <dc:creator>mykytah</dc:creator>
      <dc:date>2025-02-12T17:54:43Z</dc:date>
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    <item>
      <title>Re: PBI not applied</title>
      <link>https://community.nxp.com/t5/Layerscape/PBI-not-applied/m-p/2043530#M15392</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;you need to set RCW[429] and RCW[430] to 1 before the PBI block.&lt;/P&gt;&lt;P&gt;This enables GPIO4[29] and GPIO4[30].&lt;/P&gt;&lt;P&gt;In your configuration file you can achieve this with:&lt;/P&gt;&lt;P&gt;USB_DRVVBUS=1&lt;/P&gt;&lt;P&gt;USB_PWRFAULT=1&lt;/P&gt;&lt;P&gt;This configures the pins to GPIOs.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best, Kay&lt;/P&gt;</description>
      <pubDate>Thu, 13 Feb 2025 15:33:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/PBI-not-applied/m-p/2043530#M15392</guid>
      <dc:creator>kaypotthoff</dc:creator>
      <dc:date>2025-02-13T15:33:19Z</dc:date>
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    <item>
      <title>Re: PBI not applied</title>
      <link>https://community.nxp.com/t5/Layerscape/PBI-not-applied/m-p/2043568#M15393</link>
      <description>&lt;P&gt;Thank you for your answer.&lt;/P&gt;&lt;P&gt;The pins that I am referring to are GPIO4_10,&amp;nbsp;GPIO4_11,&amp;nbsp;GPIO4_12,&amp;nbsp;GPIO4_13 - these are controlled only with setting the SCFG PINMUX register.&amp;nbsp;&lt;/P&gt;&lt;P&gt;With RCW-controlled pins I do not have any issues.&lt;/P&gt;</description>
      <pubDate>Thu, 13 Feb 2025 16:13:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/PBI-not-applied/m-p/2043568#M15393</guid>
      <dc:creator>mykytah</dc:creator>
      <dc:date>2025-02-13T16:13:30Z</dc:date>
    </item>
    <item>
      <title>Re: PBI not applied</title>
      <link>https://community.nxp.com/t5/Layerscape/PBI-not-applied/m-p/2044318#M15397</link>
      <description>&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Would that be modified after you set the value in the PMUXCR0 in the PBI?&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;You could check it by the CodeWarrior TAP before the u-boot start to run.&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;If you want to use this register you could change it when you need it to confirm it is not changed by the other command. But should not conflict with other function.&lt;/P&gt;
&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;" lang="en-US"&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Fri, 14 Feb 2025 07:14:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/PBI-not-applied/m-p/2044318#M15397</guid>
      <dc:creator>June_Lu</dc:creator>
      <dc:date>2025-02-14T07:14:55Z</dc:date>
    </item>
    <item>
      <title>Re: PBI not applied</title>
      <link>https://community.nxp.com/t5/Layerscape/PBI-not-applied/m-p/2044524#M15400</link>
      <description>&lt;P&gt;I was indeed suspecting that something overwrites it:) Finally I found it, in the board configuration there was:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;out_be32(&amp;amp;scfg-&amp;gt;rcwpmuxcr0, 0x3300);&lt;/LI-CODE&gt;&lt;P&gt;After removing it, no one overwrites my stuff:)&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for the hint!&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 14 Feb 2025 11:49:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/PBI-not-applied/m-p/2044524#M15400</guid>
      <dc:creator>mykytah</dc:creator>
      <dc:date>2025-02-14T11:49:49Z</dc:date>
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