<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>topic Re: LS1021A-PB: Early UART Debugging on ttyS0 (Bank-0) in Layerscape</title>
    <link>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579353#M1517</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Yiping, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I had already set the fdt_high to 0xffffffff looking into latest u-boot, but no success with that. However changing the virtual UART address made the board boot properly with earlycon params as seen below:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;CONFIG_DEBUG_UART_PHYS=0x21c0500&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;CONFIG_DEBUG_UART_VIRT=0xfe1c0500&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Bootargs: earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 earlyprintk&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Skrishna&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 15 Jul 2016 11:14:28 GMT</pubDate>
    <dc:creator>skrishnakar</dc:creator>
    <dc:date>2016-07-15T11:14:28Z</dc:date>
    <item>
      <title>LS1021A-PB: Early UART Debugging on ttyS0 (Bank-0)</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579351#M1515</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am trying to get the EARLY_DEBUG working for LS1021A-PB on BANK-0 i.e via. standard 8250/16550 UART and it seems the kernel hangs after "&lt;SPAN style="color: #3a0699;"&gt;Starting Kernel...&lt;/SPAN&gt;" without proceeding further, as shown below:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Bootargs appended: &lt;SPAN style="color: #2873ee;"&gt;&lt;STRONG&gt;earlycon=uart8250,mmio,0x21c0500&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;TABLE&gt;&lt;TBODY&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;-----------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #505050;"&gt;## Booting kernel from Legacy Image at 81000000 ...&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #505050;"&gt;&amp;nbsp;&amp;nbsp; Image Name:&amp;nbsp;&amp;nbsp; Linux-4.1.8-rt8+&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #505050;"&gt;&amp;nbsp;&amp;nbsp; Image Type:&amp;nbsp;&amp;nbsp; ARM Linux Kernel Image (uncompressed)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #505050;"&gt;&amp;nbsp;&amp;nbsp; Data Size:&amp;nbsp;&amp;nbsp;&amp;nbsp; 4352576 Bytes = 4.2 MiB&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #505050;"&gt;&amp;nbsp;&amp;nbsp; Load Address: 80008000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #505050;"&gt;&amp;nbsp;&amp;nbsp; Entry Point:&amp;nbsp; 80008000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #505050;"&gt;&amp;nbsp;&amp;nbsp; Verifying Checksum ... OK&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #505050;"&gt;## Flattened Device Tree blob at 81f00000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #505050;"&gt;&amp;nbsp;&amp;nbsp; Booting using the fdt blob at 0x81f00000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #505050;"&gt;&amp;nbsp;&amp;nbsp; Loading Kernel Image ... OK&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #505050;"&gt;&amp;nbsp;&amp;nbsp; Loading Device Tree to bef11000, end bef19469 ... OK&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #505050;"&gt;Starting kernel ...&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #505050;"&gt;U&amp;nbsp; &lt;/SPAN&gt;&amp;nbsp;&amp;nbsp; &lt;SPAN style="color: #3334ca;"&gt; &amp;lt;&amp;lt;&amp;lt;&amp;lt; --- HANGS HERE -----&amp;gt;&amp;gt;&amp;gt;&amp;gt;&amp;gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Kernel config options enabled:&lt;/P&gt;&lt;P&gt;---------------------------------------&lt;/P&gt;&lt;P&gt;CONFIG_DEBUG_LL=y&lt;/P&gt;&lt;P&gt;CONFIG_DEBUG_LL_UART_8250=y&lt;/P&gt;&lt;P&gt;CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #4fcddc;"&gt;# CONFIG_DEBUG_UART_8250 is not set&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;CONFIG_DEBUG_UART_PHYS=0x21c0500&lt;/P&gt;&lt;P&gt;CONFIG_DEBUG_UART_VIRT=0xf21c0500&lt;/P&gt;&lt;P&gt;CONFIG_DEBUG_UART_8250_SHIFT=2&lt;/P&gt;&lt;P&gt;CONFIG_SERIAL_EARLYCON=y&lt;/P&gt;&lt;P&gt;CONFIG_EARLY_PRINTK=y&lt;/P&gt;&lt;P&gt;---------------------------------------&lt;/P&gt;&lt;P&gt;Any inputs are highly appreciated If I am missing anything or doing something wrong in configuration.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;SK&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 27 Jun 2016 14:54:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579351#M1515</guid>
      <dc:creator>skrishnakar</dc:creator>
      <dc:date>2016-06-27T14:54:53Z</dc:date>
    </item>
    <item>
      <title>Re: LS1021A-PB: Early UART Debugging on ttyS0 (Bank-0)</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579352#M1516</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello S&lt;SPAN class="jive-username-link jiveTT-hover-user"&gt;rikanth Krishnakar,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="jive-username-link jiveTT-hover-user"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="jive-username-link jiveTT-hover-user"&gt;It seems that this problem is caused by dtb loading to other place, please refer to the following in your log.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #505050;"&gt;Loading Device Tree to bef11000, end bef19469 ... &lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #505050;"&gt;Please set the variable&amp;nbsp; "fdt_high=0xffffffff" in your u-boot environment to avoid fdt reloading.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yiping&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 Jul 2016 08:29:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579352#M1516</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2016-07-08T08:29:49Z</dc:date>
    </item>
    <item>
      <title>Re: LS1021A-PB: Early UART Debugging on ttyS0 (Bank-0)</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579353#M1517</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Yiping, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I had already set the fdt_high to 0xffffffff looking into latest u-boot, but no success with that. However changing the virtual UART address made the board boot properly with earlycon params as seen below:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;CONFIG_DEBUG_UART_PHYS=0x21c0500&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;CONFIG_DEBUG_UART_VIRT=0xfe1c0500&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Bootargs: earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 earlyprintk&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Skrishna&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 15 Jul 2016 11:14:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579353#M1517</guid>
      <dc:creator>skrishnakar</dc:creator>
      <dc:date>2016-07-15T11:14:28Z</dc:date>
    </item>
    <item>
      <title>Re: LS1021A-PB: Early UART Debugging on ttyS0 (Bank-0)</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579354#M1518</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Srikanth,&lt;/P&gt;&lt;P&gt; I'm facing a similar problem and would like to know you figured out what the virutal address of the UART (CONFIG_DEBUG_UART_VIRT) should be.&amp;nbsp; Can you advise?&amp;nbsp; Thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Aug 2016 23:36:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579354#M1518</guid>
      <dc:creator>jasonhendrix</dc:creator>
      <dc:date>2016-08-18T23:36:27Z</dc:date>
    </item>
    <item>
      <title>Re: LS1021A-PB: Early UART Debugging on ttyS0 (Bank-0)</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579355#M1519</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Jason,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Make sure you have following config options set:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;CONFIG_EARLY_PRINTK=y&lt;/P&gt;&lt;P&gt;CONFIG_DEBUG_LL_UART_8250=y&lt;/P&gt;&lt;P&gt;CONFIG_DEBUG_UART_PHYS=0x21c0500&lt;/P&gt;&lt;P&gt;CONFIG_DEBUG_UART_VIRT=0xfe1c0500&lt;/P&gt;&lt;P&gt;CONFIG_DEBUG_UART_8250_SHIFT=0&lt;/P&gt;&lt;P&gt;# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Bootargs:&lt;/STRONG&gt; earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 earlyprintk&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;--&lt;/P&gt;&lt;P&gt;Srikanth&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Aug 2016 06:46:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579355#M1519</guid>
      <dc:creator>skrishnakar</dc:creator>
      <dc:date>2016-08-19T06:46:03Z</dc:date>
    </item>
    <item>
      <title>Re: LS1021A-PB: Early UART Debugging on ttyS0 (Bank-0)</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579356#M1520</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks srikanth, that actually helped - I get the message "Uncompressing Linux ... done. &amp;nbsp;Booting the Kernel" now. &amp;nbsp;Do you remember how you came up with the value 0xFE1C0500?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;More info - I started with the QORIQ SDK v1.9 for the LS1021A-TWR board, using Linux 3.12 (which is why I think our virtual addresses might differ). &amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;booting...&lt;BR /&gt;## Booting kernel from Legacy Image at 83000000 ...&lt;BR /&gt; Image Name: Linux-3.12.37-rt51+g67e4f3b&lt;BR /&gt;...&lt;/P&gt;&lt;P&gt;Using Device Tree in place at 98000000, end 9800792c&lt;/P&gt;&lt;P&gt;Starting kernel ...&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Uncompressing Linux... done, booting the kernel.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks again.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Aug 2016 19:24:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579356#M1520</guid>
      <dc:creator>jasonhendrix</dc:creator>
      <dc:date>2016-08-23T19:24:01Z</dc:date>
    </item>
    <item>
      <title>Re: LS1021A-PB: Early UART Debugging on ttyS0 (Bank-0)</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579357#M1521</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Jason,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have tested this on&lt;STRONG&gt; TWR-LS1021A-PB&lt;/STRONG&gt;&amp;nbsp; with &lt;STRONG&gt;Qoriq SDK-v2.0&lt;/STRONG&gt; that has linux-4.1, All I see is relocation address difference in yours:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------&lt;/P&gt;&lt;PRE&gt;Uncompressing Linux... done, booting the kernel. 
[&amp;nbsp;&amp;nbsp;&amp;nbsp; 0.000000] Booting Linux on physical CPU 0xf00 
[&amp;nbsp;&amp;nbsp;&amp;nbsp; 0.000000] Initializing cgroup subsys cpu 
[&amp;nbsp;&amp;nbsp;&amp;nbsp; 0.000000] Initializing cgroup subsys cpuacct 
[&amp;nbsp;&amp;nbsp;&amp;nbsp; 0.000000] Linux version 4.1.8-rt8+ (root@ubuntu) (gcc version 5.2.0 (Sourcery CodeBench 2015.12-138) ) #1 SMP Mon Jul 4 16:59:39 IST 2016 
[&amp;nbsp;&amp;nbsp;&amp;nbsp; 0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=70c5387d 
[&amp;nbsp;&amp;nbsp;&amp;nbsp; 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache 
[&amp;nbsp;&amp;nbsp;&amp;nbsp; 0.000000] Machine model: LS1021A TWR Board 
[&amp;nbsp;&amp;nbsp;&amp;nbsp; 0.000000] earlycon: Early serial console at MMIO 0x21c0500 (options '') 
[&amp;nbsp;&amp;nbsp;&amp;nbsp; 0.000000] earlycon: earlycon_map: Couldn't map 0x21c0500 
[&amp;nbsp;&amp;nbsp;&amp;nbsp; 0.000000] Malformed early option 'earlycon' 
[&amp;nbsp;&amp;nbsp;&amp;nbsp; 0.000000] bootconsole [earlycon0] enabled 
[&amp;nbsp;&amp;nbsp;&amp;nbsp; 0.000000] Forcing write-allocate cache policy for SMP 
[&amp;nbsp;&amp;nbsp;&amp;nbsp; 0.000000] Memory policy: Data cache writealloc 
[&amp;nbsp;&amp;nbsp;&amp;nbsp; 0.000000] psci: probing for conduit method from DT.&lt;/PRE&gt;&lt;P&gt;-----------------------------------&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I saw the address conversion some where in the past discussion of Early uart on LS1043. It appears your kernel is entering the early debugging.. can you check If the fdt_high is set appropriately as mentioned by "Yiping" above ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 24 Aug 2016 10:47:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579357#M1521</guid>
      <dc:creator>skrishnakar</dc:creator>
      <dc:date>2016-08-24T10:47:28Z</dc:date>
    </item>
    <item>
      <title>Re: LS1021A-PB: Early UART Debugging on ttyS0 (Bank-0)</title>
      <link>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579358#M1522</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Srikanth,&lt;/P&gt;&lt;P&gt;&amp;nbsp; Thanks again for taking the time to respond. &amp;nbsp;It's very possible that the virtual address you provided is also correct for my system. &amp;nbsp;The problem might not be UART config, but some other crash instead. &amp;nbsp;I'll start looking at the code around the message "Booting Linux on Physical CPU..." &amp;nbsp;I do have fdt_high set, here are my enviro variables:&lt;/P&gt;&lt;P&gt;=&amp;gt; printenv&lt;BR /&gt;baudrate=115200&lt;BR /&gt;bootargs=earlycon=uart8250,mmio,0x21d0500 console=ttyS2,115200 earlyprintk&lt;BR /&gt;bootdelay=3&lt;BR /&gt;dboot=tftp 80000000 krnld.img; source 80000000&lt;BR /&gt;dnsip=192.177.13.14&lt;BR /&gt;eth1addr=00:04:9f:03:ec:08&lt;BR /&gt;eth2addr=00:04:9f:03:ec:09&lt;BR /&gt;ethact=eTSEC1&lt;BR /&gt;ethaddr=00:04:9f:03:ec:07&lt;BR /&gt;ethprime=eTSEC1&lt;BR /&gt;fdt_high=0xffffffff&lt;BR /&gt;gatewayip=192.111.11.111&lt;BR /&gt;initrd_high=0xffffffff&lt;BR /&gt;ipaddr=192.168.11.11&lt;BR /&gt;netmask=255.255.255.0&lt;BR /&gt;serverip=192.168.11.22&lt;BR /&gt;stderr=serial&lt;BR /&gt;stdin=serial&lt;BR /&gt;stdout=serial&lt;/P&gt;&lt;P&gt;Environment size: 494/4092 bytes&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 24 Aug 2016 17:52:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Layerscape/LS1021A-PB-Early-UART-Debugging-on-ttyS0-Bank-0/m-p/579358#M1522</guid>
      <dc:creator>jasonhendrix</dc:creator>
      <dc:date>2016-08-24T17:52:18Z</dc:date>
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